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Browsing EEE Journal Articles by Author "Yeo, Kiat Seng."

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Browsing EEE Journal Articles by Author "Yeo, Kiat Seng."

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Date Title Author Type
2008
16.6- and 28-GHz fully integrated CMOS RF switches with improved body floating.
Li, Qiang.; Zhang, Yue Ping.; Yeo, Kiat Seng.; Lim, Wei Meng.
Journal Article
2006
A 1.8-V 2.4/5.15-GHz dual-band LC VCO in 0.18-μm CMOS technology.
Jia, Lin.; Ma, Jianguo.; Yeo, Kiat Seng.; Yu, Xiao Peng.; Do, Manh Anh.; Lim, Wei Meng.
Journal Article
2013
A 2-D distributed power combining by metamaterial-based zero phase shifter for 60-GHz power amplifier in 65-nm CMOS.
Fei, Wei.; Yu, Hao.; Shang, Yang.; Yeo, Kiat Seng.
Journal Article
2009
A 3-8 GHz low-noise CMOS amplifier.
Meaamar, Ali.; Boon, Chirn Chye.; Do, Manh Anh.; Yeo, Kiat Seng.
Journal Article
2008
An 8-bit 200-MSample/s pipelined ADC with mixed-mode front-end S/H circuit.
Jiang, Shan.; Do, Manh Anh.; Yeo, Kiat Seng.; Lim, Wei Meng.
Journal Article
2004
9.3–10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance.
Lin, Jia.; Ma, Jianguo.; Yeo, Kiat Seng.; Do, Manh Anh.
Journal Article
2005
Accurate and scalable RF interconnect model for silicon-based RFIC applications.
Sia, Choon Beng.; Ong, Beng Hwee.; Yeo, Kiat Seng.; Ma, Jianguo.; Do, Manh Anh.
Journal Article
2007
Broad-band design techniques for transimpedance amplifiers.
Lu, Zhenghao.; Yeo, Kiat Seng.; Ma, Jianguo.; Do, Manh Anh.; Lim, Wei Meng.; Chen, Xueying.
Journal Article
1998
A charge-trapping-based technique to design low-voltage BiCMOS logic circuits.
Yeo, Kiat Seng.; Rofail, Samir S.
Journal Article
1999
Comments on “Negative capacitance effect in semiconductor devices”.
Ma, Jianguo.; Yeo, Kiat Seng.; Do, Manh Anh.
Journal Article
2006
A compact size coupling controllable filter with separate electric and magnetic coupling paths.
Ma, Kaixue.; Ma, Jianguo.; Yeo, Kiat Seng.; Do, Manh Anh.
Journal Article
2008
Complex shaped on-wafer interconnects modeling for CMOS RFICs.
Shi, Xiaomeng.; Yeo, Kiat Seng.; Ma, Jianguo.; Do, Manh Anh.; Li, Erping.
Journal Article
2010
Design and analysis of ultra low power true single phase clock CMOS 2/3 prescaler.
Yeo, Kiat Seng.; Boon, Chirn Chye.; Lim, Wei Meng.; Do, Manh Anh.; Krishna, Manthena Vamshi.
Journal Article
2006
Design and optimization of the extended true single-phase clock-based prescaler.
Yu, Xiao Peng.; Do, Manh Anh.; Lim, Wei Meng.; Yeo, Kiat Seng.; Ma, Jianguo.
Journal Article
2009
Design and sensitivity analysis of a new current-mode sense amplifier for low-power SRAM.
Do, Anh Tuan.; Kong, Zhi Hui.; Yeo, Kiat Seng.; Low, Jeremy Yung Shern.
Journal Article
2011
Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysis.
Fei, Wei.; Yu, Hao.; Zhang, Wei.; Yeo, Kiat Seng.
Journal Article
2010
Design of a CMOS broadband transimpedance amplifier with active feedback.
Lu, Zhenghao.; Yeo, Kiat Seng.; Lim, Wei Meng.; Do, Manh Anh.; Boon, Chirn Chye.
Journal Article
2005
Design of a low power wide-band high resolution programmable frequency divider.
Yu, Xiao Peng.; Do, Manh Anh.; Jia, Lin.; Ma, Jianguo.; Yeo, Kiat Seng.
Journal Article
2009
Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing.
Zhu, Ning.; Goh, Wang Ling.; Zhang, Weija.; Yeo, Kiat Seng.; Kong, Zhi Hui.
Journal Article
2012
A dividerless PLL with low power and low reference spur by aperture-phase detector and phase-to-analog converter.
Cai, Deyun.; Fu, Haipeng.; Ren, Junyan.; Li, Wei.; Li, Ning.; Yu, Hao.; Yeo, Kiat Seng.
Journal Article