Design of a low power wide-band high resolution programmable frequency divider

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Design of a low power wide-band high resolution programmable frequency divider

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dc.contributor.author Yu, Xiao Peng
dc.contributor.author Do, Manh Anh
dc.contributor.author Jia, Lin
dc.contributor.author Ma, Jianguo
dc.contributor.author Yeo, Kiat Seng
dc.date.accessioned 2009-04-18T13:48:57Z
dc.date.available 2009-04-18T13:48:57Z
dc.date.copyright 2005
dc.date.issued 2009-04-18T13:48:57Z
dc.identifier.citation Yu, X. P. (2005). Design of a low power wide-band high resolution programmable frequency divider. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13(9), 1098-1103.
dc.identifier.issn 1063-8210
dc.identifier.uri http://hdl.handle.net/10220/4569
dc.description.abstract The design of a high-speed wide-band high resolution programmable frequency divider is investigated. A new reloadable D flip-flop for the high speed programmable frequency divider is proposed. It is optimized in terms of propagation delay and power consumption as compared with the existing designs. Measurement results show that an all-stage programmable counter implemented with this D flip-flop using the Chartered 0.18 μm CMOS process is capable of operating up to 1.8 GHz for a 1.8 V supply voltage and a 5.8-mW power consumption. By using this counter, an ultra-wide range high resolution frequency divider is achieved with low power consumption for 5-6-GHz wireless LAN applications.
dc.format.extent 6 p.
dc.language.iso en
dc.relation.ispartofseries IEEE transactions on very large scale integration (VLSI) systems
dc.rights © 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
dc.subject DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits.
dc.title Design of a low power wide-band high resolution programmable frequency divider
dc.type Journal Article
dc.contributor.research Centre for Integrated Circuits and Systems
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/TVLSI.2005.857153
dc.description.version Published version

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