RFCMOS unit width optimization technique

DSpace/Manakin Repository


Search DR-NTU

Advanced Search Subject Search


My Account

RFCMOS unit width optimization technique

Show simple item record

dc.contributor.author Tong, Ah Fatt
dc.contributor.author Lim, Wei Meng
dc.contributor.author Sia, Choon Beng
dc.contributor.author Yeo, Kiat Seng
dc.contributor.author Teng, Zee Long
dc.contributor.author Ng, Pei Fern
dc.date.accessioned 2009-06-23T03:49:40Z
dc.date.available 2009-06-23T03:49:40Z
dc.date.copyright 2007
dc.date.issued 2009-06-23T03:49:40Z
dc.identifier.citation Tong, A. F., Lim, W. M., Sia, C. B., Yeo, K. S., Teng, Z. L., & Ng, P. F. (2007). RFCMOS unit width optimization technique. IEEE Transactions on Microwave Theory and Techniques, 55(9), 1844-1853.
dc.identifier.issn 0018-9480
dc.identifier.uri http://hdl.handle.net/10220/4657
dc.description.abstract In this paper, we demonstrate a unit width (Wf) optimization technique based on their unity short-circuit current gain frequency (ft), unilateral power gain frequency (f MAX), and high-frequency (HF) noise for RFCMOS transistors. Our results show that the trend for the above figures-of-merit (FOMs) with respect to the Wf change is different; hence, some tradeoff is required to obtain the optimum Wf value. During the HF noise analysis, a newFOMis proposed to study the Wf effect on the HF noise performance. In our experiment, the flicker noise of the transistor is also measured and the result shows that the change in Wf does not affect the noise spectral density at the low-frequency range. This technique enables RF engineers to optimize the transistor’s layout and helps to select the optimum Wf for transistors used in specific circuit design such as the low-noise amplifier, voltage-controlled oscillator, and mixer. Furthermore, by using layout optimized transistors in the RF circuit, the optimal circuit’s performance can be easily achieved and, thus, greatly reduced the circuit development time. In the aspect of RF device modeling, by knowing the optimum Wf for a particular process or technology, the number of transistors to model is reduced and, hence, greatly shortens the RF modeling development time for existing and future technologies.
dc.format.extent 10 p.
dc.language.iso en
dc.relation.ispartofseries IEEE transactions on microwave theory and techniques
dc.rights © 2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site.
dc.subject DRNTU::Engineering::Electrical and electronic engineering.
dc.title RFCMOS unit width optimization technique
dc.type Journal Article
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/TMTT.2007.903348
dc.description.version Published version

Files in this item

Files Size Format View Description
RF CMOS Unit Width Optimization Technique.pdf 1.210Mb PDF View/Open Published version

This item appears in the following Collection(s)

Show simple item record


Total views

All Items Views
RFCMOS unit width optimization technique 296

Total downloads

All Bitstreams Views
RF CMOS Unit Width Optimization Technique.pdf 343

Top country downloads

Country Code Views
United States of America 113
China 62
Singapore 18
Germany 16
India 15

Top city downloads

city Views
Mountain View 67
Beijing 27
Singapore 18
Kiez 7
Kunming 6