mirage

A new redundant binary Booth encoding for fast 2^n-bit multiplier design

DSpace/Manakin Repository

 

Search DR-NTU


Advanced Search Subject Search

Browse

My Account

A new redundant binary Booth encoding for fast 2^n-bit multiplier design

Show full item record

Title: A new redundant binary Booth encoding for fast 2^n-bit multiplier design
Author: He, Yajuan; Chang, Chip Hong
Copyright year: 2009
Abstract: The use of redundant binary (RB) arithmetic in the design of high-speed digital multipliers is beneficial due to its high modularity and carry-free addition. To reduce the number of partial products, a high-radix-modified Booth encoding algorithm is desired. However, its use is hampered by the complexity of generating the hard multiples and the overheads resulting from negative multiples and normal binary (NB) to RB number conversion. This paper proposes a new RB Booth encoding scheme to circumvent these problems. The idea is to polarize two adjacent Booth encoded digits to directly form an RB partial product to avoid the hard multiple of high-radix Booth encoding without incurring any correction vector. The proposed method leads to lower encoding and decoding complexity than the recently proposed RB Booth encoder. Synthesis results using Artisan TSMC 0.18- m standard-cell library show that the RB multipliers designed with our proposed Booth encoding algorithm exhibit on average 14% higher speed and 17% less energy-delay product than the existing multiplication algorithms for a gamut of power-of-two word lengths from 8 to 64 b.
Subject: DRNTU::Engineering::Electrical and electronic engineering
Type: Journal Article
Series/ Journal Title: IEEE transactions on circuits and systems—I
School: School of Electrical and Electronic Engineering
Rights: He, Y., & Chang, C. H. (2009). New Redundant Binary Booth Encoding for Fast 2^n-bit Multiplier Design. IEEE Transactions On Circuits And Systems—I. 56(6), 1192-1201.
Version: Published version

Files in this item

Files Size Format View
A new redundant ... -bit multiplier design.pdf 775.1Kb PDF View/Open
   

DOI Query

- Get published version (via Digital Object Identifier)
   

This item appears in the following Collection(s)

Show full item record

Statistics

Total views

All Items Views
A new redundant binary Booth encoding for fast 2^n-bit multiplier design 552

Total downloads

All Bitstreams Views
A new redundant binary Booth encoding for fast 2^n-bit multiplier design.pdf 662

Top country downloads

Country Code Views
United States of America 207
India 172
China 101
Czech Republic 26
Iran 19

Top city downloads

city Views
Mountain View 121
Beijing 50
Prague 26
New Delhi 23
Hyderabad 20