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Hybrid-mode SRAM sense amplifiers : new approach on transistor sizing.

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Hybrid-mode SRAM sense amplifiers : new approach on transistor sizing.

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dc.contributor.author Do, Anh Tuan.
dc.contributor.author Kong, Zhi Hui.
dc.contributor.author Yeo, Kiat Seng.
dc.date.accessioned 2010-05-05T04:40:09Z
dc.date.available 2010-05-05T04:40:09Z
dc.date.copyright 2008
dc.date.issued 2010-05-05T04:40:09Z
dc.identifier.citation Do, A. T., Kong, Z. H., Yeo, K. S. (2008). Hybrid-Mode SRAM Sense Amplifiers: New Approach on Transistor Sizing. IEEE Transactions on Circuits and Systems—II. 55(10), 986-990.
dc.identifier.issn 1549-7747
dc.identifier.uri http://hdl.handle.net/10220/6260
dc.description.abstract A novel high-speed sense amplifier for ultra-low-voltage SRAM applications is presented. It introduces a completely different way of sizing the aspect ratio of the transistors on the data-path, hence realizing a current-voltage hybrid mode Sense Amplifier. Extensive post-layout simulations have proved that the new Sense Amplifier provides both high-speed and low-power properties, with its delay and power reduced to 25.8% and 37.6% of those of the best prior art. It also offers a much better read-effectiveness and robustness against the bit- and data-line capacitances as well as VDD variations. Furthermore, the new Sense Amplifier is able to tolerate a large difference between the parasitic capacitances associated with the complementary DLs. It can operate down to a supply voltage of 0.9 V, the lowest reported for a 0.18 µm CMOS process. A modified cross-coupled amplifier is also introduced, allowing the Sense Amplifier to operate down to 0.55 V.
dc.format.extent 5 p.
dc.language.iso en
dc.relation.ispartofseries IEEE transactions on circuits and systems—II
dc.rights © 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
dc.subject DRNTU::Engineering::Electrical and electronic engineering.
dc.title Hybrid-mode SRAM sense amplifiers : new approach on transistor sizing.
dc.type Journal Article
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/TCSII.2008.2001965
dc.description.version Published version

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