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Bit-error-rate performance of intra-chip wireless interconnect systems.

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Bit-error-rate performance of intra-chip wireless interconnect systems.

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dc.contributor.author Zhang, Yue Ping.
dc.date.accessioned 2010-08-20T00:51:26Z
dc.date.available 2010-08-20T00:51:26Z
dc.date.copyright 2004
dc.date.issued 2010-08-20T00:51:26Z
dc.identifier.citation Zhang, Y. P. (2004). Bit-error-rate performance of intra-chip wireless interconnect systems. IEEE Communications Letters. 8(1), 39-41.
dc.identifier.issn 1089-7798
dc.identifier.uri http://hdl.handle.net/10220/6324
dc.description.abstract This Letter evaluates the bit-error rate (BER) performance of a coherent binary phase-shift keying interconnect system operating on an intra-chip wireless channel at 15 GHz. Results show that the system performance degrades with the separation distance and the data rate. A high data rate at 2 Gb/s with a low BER 10 5 over the entire chip of size 20 20 mm can be achieved with the transmitted power of 10 dBm.
dc.format.extent 3 p.
dc.language.iso en
dc.relation.ispartofseries IEEE communications letters
dc.rights © 2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
dc.subject DRNTU::Engineering::Electrical and electronic engineering::Electronic systems.
dc.title Bit-error-rate performance of intra-chip wireless interconnect systems.
dc.type Journal Article
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/LCOMM.2003.822514
dc.description.version Published version

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