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A general decoding framework for high-rate LDPC codes

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A general decoding framework for high-rate LDPC codes

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dc.contributor.author Hosseini, S. M. Ehsan
dc.contributor.author Goh, Wang Ling
dc.contributor.author Chan, Kheong Sann
dc.date.accessioned 2010-08-31T03:04:11Z
dc.date.available 2010-08-31T03:04:11Z
dc.date.copyright 2009
dc.date.issued 2010-08-31T03:04:11Z
dc.identifier.citation Hosseini, S. M. E., Goh, W. L., & Chan, K. S. (2009). A general decoding framework for high-rate LDPC codes. In proceedings of the 12th International Symposium on Integrated Circuits: Singapore, (pp.695-698).
dc.identifier.uri http://hdl.handle.net/10220/6376
dc.description.abstract This paper presents a hardware solution to the design of general low-density parity-check (LDPC) decoders, which simplifies the delivery network required by the message passing algorithm. While many designs of LDPC decoders for specific classes of codes exist in the literature, the design of a general LDPC decoder capable of supporting random LDPC codes is still challenging. The method proposed in this paper tries to pack different check node (CN) and variable node (VN) messages in the Tanner graph representation of the LDPC code, and is therefore called message packing. This method takes advantage of the fact that for high-rate LDPC’s the CN’s degree is much larger than the VN’s, and two distinct methods for delivering the messages to the CNs and VNs are proposed. Using the proposed interconnection network (IN) results in lower complexity decoding of LDPC codes when compared to other designs.
dc.format.extent 4 p.
dc.language.iso en
dc.rights © 2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
dc.subject DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
dc.title A general decoding framework for high-rate LDPC codes
dc.type Conference Paper
dc.contributor.conference IEEE International Symposium on Integrated Circuits (12th : 2009 : Singapore)
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.openurl http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5403795
dc.description.version Published version
dc.contributor.organization Data Storage Institute, A*STAR

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