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An area efficient high turn ratio monolithic transformer for silicon RFIC

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An area efficient high turn ratio monolithic transformer for silicon RFIC

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dc.contributor.author Lim, Chee Chong
dc.contributor.author Yeo, Kiat Seng
dc.contributor.author Chew, Kok Wai Johnny
dc.contributor.author Lim, Suh Fei
dc.contributor.author Boon, Chirn Chye
dc.contributor.author Qiu, Ping
dc.contributor.author Do, Manh Anh
dc.contributor.author Chan, Lap
dc.date.accessioned 2010-08-31T06:07:39Z
dc.date.available 2010-08-31T06:07:39Z
dc.date.copyright 2008
dc.date.issued 2010-08-31T06:07:39Z
dc.identifier.citation Lim, C. C., Yeo K. S., Chew, K. W., Lim, S. F., Boon, C. C., Qiu, P., et al. (2008). An area efficient high turn ratio monolithic transformer for silicon RFIC. IEEE Radio Frequency Integrated Circuits Symposium: Atlanta,GA,USA, (pp.167-170).
dc.identifier.uri http://hdl.handle.net/10220/6381
dc.description.abstract A novel way of manufacturing an on-chip transformer that produces high inductance ratio (LSec/LPri > 30) with excellent area efficiency is presented. This technique uses an electrical all-round coupling effect of a conductor A (Primary Coil), having large effective width, and a densely routed conductor B (Secondary Coil). Thus, a high turn ratio monolithic transformer, using minimum die size, is realizable on silicon. The coil having the dense routing can also be doubled up as a monolithic RF choke on silicon. In this work, area efficiency is compared between various type of existing transformer structures (i.e. Interleaved and Stacked transformer), based on unit inductance. The method presented is fully compatible to all the foundry standard CMOS processes.
dc.format.extent 4 p.
dc.language.iso en
dc.rights © 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
dc.subject DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits.
dc.title An area efficient high turn ratio monolithic transformer for silicon RFIC
dc.type Conference Paper
dc.contributor.conference IEEE Radio Frequency Integrated Circuits Symposium (2008 : Atlanta, Georgia, US)
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/RFIC.2008.4561410
dc.description.version Published version
dc.contributor.organization Chartered Semiconductor Manufacturing Ltd

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