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Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam

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Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam

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dc.contributor.author Ng, Chi Yung
dc.contributor.author Chen, Tupei
dc.contributor.author Ding, Liang
dc.contributor.author Fung, Stevenson Hon Yuen
dc.date.accessioned 2010-09-07T01:54:55Z
dc.date.available 2010-09-07T01:54:55Z
dc.date.copyright 2006
dc.date.issued 2010-09-07T01:54:55Z
dc.identifier.citation Ng, C. Y., Chen, T. P., Ding, L., & Fung, S. H. Y. (2006). Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam. IEEE Electron Device Letters, 27(4), 231-233.
dc.identifier.issn 0741-3106
dc.identifier.uri http://hdl.handle.net/10220/6413
dc.description.abstract Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperatures have been investigated. A threshold voltage window of ∼ 0.5 V is achieved under write/erase (W/E) voltages of +12 V/-12 V for 1 ms. The devices exhibit good endurance up to 105 W/E cycles even at a high operation temperature of 150°C. They also have good retention characteristics with an extrapolated ten-year memory window of ∼ 0.3 V at 100°C.
dc.format.extent 3 p.
dc.language.iso en
dc.relation.ispartofseries IEEE electron device letters
dc.rights © 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
dc.subject DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
dc.title Memory characteristics of MOSFETs with densely stacked silicon nanocrystal layers in the gate oxide synthesized by low-energy ion beam
dc.type Journal Article
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/LED.2006.871183
dc.description.version Published version

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