| dc.contributor.author |
Wong, Jen It. |
| dc.contributor.author |
Yang, Ming. |
| dc.contributor.author |
New, C. L. |
| dc.contributor.author |
Khor, T. S. |
| dc.contributor.author |
Chen, Tupei. |
| dc.contributor.author |
Ng, Chi Yung. |
| dc.date.accessioned |
2011-07-14T07:57:23Z |
| dc.date.available |
2011-07-14T07:57:23Z |
| dc.date.copyright |
2006 |
| dc.date.issued |
2011-07-14 |
| dc.identifier.uri |
http://hdl.handle.net/10220/6910 |
| dc.description.abstract |
In this paper, we present a simulation study on the trapping properties of flash memory device based on discrete nanoscale silicon embedded in silicon-dioxide (SiO2). Taurus Suprem-4 and Taurus Medici are being used to carry out the simulations. The memory structure with a tunnel oxide of 3, 5 and 9 nm and a control oxide of 10, 20 and 40 nm have been simulated, respectively. The discrete nanoscale silicon with the size of 20 nm times 20 nm, 10 nm times 10 nm, and 5 nm times 5 nm have also been simulated, respectively. |
| dc.format.extent |
4 p. |
| dc.language.iso |
en |
| dc.rights |
© 2006 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. |
| dc.subject |
DRNTU::Engineering::Electrical and electronic engineering. |
| dc.title |
Simulation of flash memory characteristics based on discrete nanoscale silicon. |
| dc.type |
Conference Paper |
| dc.contributor.conference |
Semiconductor Electronics, 2006. ICSE '06. |
| dc.contributor.school |
School of Electrical and Electronic Engineering |
| dc.identifier.doi |
http://dx.doi.org/10.1109/SMELEC.2006.380727 |
| dc.description.version |
Published version |
| dc.contributor.organization |
Chartered Semiconductor Manufacturing Ltd |
