|
Title:
|
Nickel-silicided Schottky junction CMOS transistors with gate-all-around nanowire channels.
|
|
Author:
|
Tan, Eu Jin.; Pey, Kin Leong.; Singh, Navab.; Lo, Guo-Qiang.; Chi, Dong Zhi.; Chin, Yoke King.; Tang, L. J.; Lee, Pooi See.; Ho, C. K. F.
|
|
Copyright year:
|
2008 |
|
Abstract:
|
We demonstrate high-performance Schottky CMOS
transistors with NiSi source/drain and gate-all-around (GAA) silicon nanowire (~5 nm) channels. The transistors exhibit
good Ion/Ioff characteristics, along with fully controlled shortchannel
effects revealed by low drain-induced barrier lowering
(~10 mV/V) and near-ideal subthreshold swing (~60 mV/dec).
Although the N-MOSFET required dopant segregation to suppress
the ambipolar behavior, excellent P-MOSFET characteristics
could be achieved without the use of barrier modification
techniques. We attribute this to the Schottky barrier thinning
in a nanosized metal–semiconductor junction and superior gate
electrostatic control in a GAA nanowire architecture. |
|
Subject:
|
DRNTU::Engineering::Materials. |
|
Type:
|
Journal Article |
|
Series/ Journal Title:
|
IEEE electron device letters |
|
School:
|
School of Materials Science and Engineering |
|
Rights:
|
© 2008 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: http://dx.doi.org/10.1109/LED.2008.2000876. |
|
Version:
|
Accepted version |
