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Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysis

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Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysis

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dc.contributor.author Fei, Wei
dc.contributor.author Yu, Hao
dc.contributor.author Zhang, Wei
dc.contributor.author Yeo, Kiat Seng
dc.date.accessioned 2012-09-20T07:24:33Z
dc.date.available 2012-09-20T07:24:33Z
dc.date.copyright 2011
dc.date.issued 2012-09-20
dc.identifier.citation Fei, W., Yu, H., Zhang, W., & Yeo, K. S. (2011). Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysis. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(6), 1012-1025.
dc.identifier.issn 1063-8210
dc.identifier.uri http://hdl.handle.net/10220/8595
dc.description.abstract Design of hybrid circuits and systems based on CMOS and nano-device requires rethinking of fundamental circuit analysis to aid design exploration. Conventional circuit analysis with modified nodal analysis (MNA) cannot consider new nano-devices such as memristor together with the traditional CMOS devices. This paper has introduced a new MNA method with magnetic flux (Φ) as new state variable. New SPICE-like circuit simulator is thereby developed for the design of hybrid CMOS and memristor circuits. A number of CMOS and memristor-based designs are explored, such as oscillator, chaotic circuit, programmable logic, analog-learning circuit, and crossbar memory, where their functionality, performance, reliability and power can be efficiently verified by the newly developed simulator. Specifically, one new 3-D-crossbar architecture with diode-added memristor is also proposed to improve integration density and to avoid sneak path during read-write operation.
dc.language.iso en
dc.relation.ispartofseries IEEE transactions on very large scale integration (VLSI) systems
dc.rights © 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/TVLSI.2011.2136443].
dc.subject DRNTU::Engineering::Electrical and electronic engineering.
dc.title Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysis
dc.type Journal Article
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/TVLSI.2011.2136443
dc.description.version Accepted version
dc.identifier.rims 157862

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