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Analysis and modeling of internal state variables for dynamic effects of nonvolatile memory devices.

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Analysis and modeling of internal state variables for dynamic effects of nonvolatile memory devices.

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dc.contributor.author Shang, Yang.
dc.contributor.author Fei, Wei.
dc.contributor.author Yu, Hao.
dc.date.accessioned 2012-10-11T06:33:55Z
dc.date.available 2012-10-11T06:33:55Z
dc.date.copyright 2012
dc.date.issued 2012-10-11
dc.identifier.citation Shang, Y., Fei, W., & Yu, H. (2012). Analysis and modeling of internal state variables for dynamic effects of nonvolatile memory devices. IEEE Transactions on Circuits and Systems I: Regular Papers, 59(9), 1906-1918.
dc.identifier.uri http://hdl.handle.net/10220/8762
dc.description.abstract Hybrid integration of CMOS and nonvolatile memory (NVM) devices has become the foundation for emerging nonvolatile memory-based computing. The primary challenge to validate hybrid memory system with both CMOS and NVM devices is to develop a SPICE-like simulator that can simulate the dynamic behavior accurately and efficiently. Since memristor, spin-transfer-toque magnetic-tunneling-junction (STT-MTJ) and phase-change-memory (PCM) devices are the most promising candidates of next generation of NVM devices, it is under great interest in including these new devices in the standard CMOS design flow. The previous approaches either ignore dynamic effect without consideration of internal states for dynamic behavior, or need complex equivalent circuits to represent those devices. This paper proposes a new modified nodal analysis for NVM devices with identified internal state variables for dynamic behavior. As such, compact SPICE-like implementation can be derived for all three new NVM devices in the design of large-scale memory circuits. As demonstrated by a number of examples on hybrid memory circuits with both CMOS and NVM devices, our newly developed SPICE-like simulator can capture dynamic behaviors of memristor, STT-MTJ and PCM devices, and can also reduce CPU runtime by 20-69 times when compared to the previous equivalent circuit based approaches.
dc.language.iso en
dc.relation.ispartofseries IEEE transactions on circuits and systems I: regular papers
dc.rights © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [DOI: http://dx.doi.org/10.1109/TCSI.2011.2180441].
dc.subject DRNTU::Engineering::Electrical and electronic engineering.
dc.title Analysis and modeling of internal state variables for dynamic effects of nonvolatile memory devices.
dc.type Journal Article
dc.contributor.school School of Electrical and Electronic Engineering
dc.identifier.doi http://dx.doi.org/10.1109/TCSI.2011.2180441
dc.description.version Accepted version

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