Browsing by Author Chang, Chip Hong


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Issue DateTitleAuthor(s)
2009Hard multiple generator for higher radix modulo 2^n-1 multiplicationMuralidharan, Ramya; Chang, Chip Hong
2009High-level synthesis algorithm for the design of reconfigurable constant multiplierChen, Jiajia; Chang, Chip Hong
2008High-speed and low-power serial accumulator for serial/parallel multiplierMeher, Manas Ranjan; Jong, Ching Chuen; Chang, Chip Hong
2008Information theoretic approach to complexity reduction of FIR filter designChang, Chip Hong; Chen, Jiajia; Vinod, Achutavarrier Prasad
2008Intellectual property authentication by watermarking scan chain in design-for-testability flowCui, Aijiao; Chang, Chip Hong
2008IP watermarking using incremental technology mapping at logic synthesis levelCui, Aijiao; Chang, Chip Hong; Tahar, Sofiène
2015Low field domain wall dynamics in artificial spin-ice basis structureLim, Gerard Joseph; Kwon, Jae Suk; Goolaup, Sarjoosing; Kerk, I. S.; Chang, Chip Hong; Roy, K.; Lew, Wen Siang
2004Low power low voltage adder cells for digital multiplierZhang, Mingyan
2005New adaptive color quantization method based on self-organizing mapsChang, Chip Hong; Xu, Pengfei; Xiao, Rui; Srikanthan, Thambipillai
 2013A new approach to the design of efficient residue generators for arbitrary moduliLow, Jeremy Yung Shern; Chang, Chip Hong
2016A new event-driven Dynamic Vision Sensor based Physical Unclonable Function for camera authentication in reactive monitoring systemZheng, Yue; Cao, Yuan; Chang, Chip Hong
2009A new redundant binary Booth encoding for fast 2^n-bit multiplier designHe, Yajuan; Chang, Chip Hong
2004Optimization of FIR filters with CSD coefficientsYe, Zhi.
2009Optimization of structural adders in fixed coefficient transposed direct form FIR filtersFaust, Mathias; Chang, Chip Hong
 2012Pipelined adder graph optimization for high speed multiple constant multiplicationKumm, Martin; Zipf, Peter; Faust, Mathias; Chang, Chip Hong
2008A power-delay efficient hybrid carry-lookahead/carry-select based redundant binary to two’s complement converterHe, Yajuan; Chang, Chip Hong
2014A pragmatic per-device licensing scheme for hardware IP cores on SRAM-based FPGAsZhang, Li; Chang, Chip Hong
2014Protecting FPGA design with elliptic curve cryptographyWei, Wei
2007A residue-to-binary converter for a new five-moduli setCao, Bin; Chang, Chip Hong; Srikanthan, Thambipillai
2005A review of 0.18-µm full adder performances for tree structured arithmetic circuitsChang, Chip Hong; Gu, Jiang Min; Zhang, Mingyan