Browsing by Author Chong, Kwen-Siong


Or, select a letter below to browse by last name
0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Showing results 2 to 21 of 34 < previous   next >
Issue DateTitleAuthor(s)
 2013A 250mV sub-threshold asynchronous 8051microcontroller with a novel 16T SRAM cell for improved reliability in 40nm CMOSKim, Jaeyoung; Chong, Kwen-Siong; Chang, Joseph Sylvester; Mazumder, Pinaki
2016Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAMHo, Weng-Geng; Ne, Kyaw Zwa Lwin; Prashanth Srinivas, Nagarajan; Chong, Kwen-Siong; Kim, Tony Tae-Hyoung; Gwee, Bah Hwee
2017Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router designHo, Weng-Geng; Chong, Kwen-Siong; Ne, Kyaw Zwa Lwin; Gwee, Bah-Hwee; Chang, Joseph Sylvester
 2012A comparative study on asynchronous Quasi-Delay-Insensitive templatesChang, Kok-Leong; Lin, Tong; Ho, Weng-Geng; Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester
2015Counteracting differential power analysis: Hiding encrypted data from circuit cellsChong, Kwen-Siong; Ne, Kyaw Zwa Lwin; Ho, Weng-Geng; Liu, Nan; Akbar, Ali H.; Gwee, Bah-Hwee; Chang, Joseph Sylvester
2021Dual-hiding side-channel-attack resistant FPGA-based asynchronous-logic AES : design, countermeasures and evaluationChong, Kwen-Siong; Ng, Jun-Sheng; Chen, Juncheng; Lwin, Ne Kyaw Zwa; Kyaw, Nay Aung; Ho, Weng-Geng; Chang, Joseph; Gwee, Bah-Hwee
 2012Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor LogicHo, Weng-Geng; Chong, Kwen-Siong; Lin, Tong; Gwee, Bah Hwee; Chang, Joseph Sylvester
2007Energy-efficient synchronous-logic and asynchronous-logic FFT/IFFT processorsChong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester
2016High Performance Low Overhead Template-based Cell-Interleave Pipeline (TCIP) for Asynchronous-Logic QDI CircuitsHo, Weng-Geng; Liu, Nan; Ne, Kyaw Zwa Lwin; Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester
2015High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC)Ho, Weng-Geng; Chong, Kwen-Siong; Lwin, Ne Kyaw Zwa; Chang, Joseph Sylvester; Gwee, Bah Hwee
2016High Secured Low Power Multiplexer-LUT Based AES S-Box ImplementationPammu, Ali Akbar; Chong, Kwen-Siong; Ne, Kyaw Zwa Lwin; Gwee, Bah Hwee
2020A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)Ng, Jun-Sheng; Chen, Juncheng; Kyaw, Nay Aung; Lwin, Ne Kyaw Zwa; Ho, Weng-Geng; Chong, Kwen-Siong; Gwee, Bah-Hwee
 2018A highly efficient side channel attack with profiling through relevance-learning on physical leakage informationAli Akbar Pammu; Chong, Kwen-Siong; Wang, Yi; Gwee, Bah-Hwee
2016Highly secured arithmetic hiding based S-Box on AES-128 implementationPammu, Ali Akbar; Chong, Kwen-Siong; Gwee, Bah Hwee
2016Interceptive side channel attack on AES-128 wireless communications for IoT applicationsPammu, Ali Akbar; Chong, Kwen-Siong; Ho, Weng-Geng; Gwee, Bah Hwee
2016Low Normalized Energy Derivation Asynchronous Circuit Synthesis Flow through Fork-Join Slack Matching for Cryptographic ApplicationsLiu, Nan; Chong, Kwen-Siong; Ho, Weng-Geng; Gwee, Bah Hwee; Chang, Joseph Sylvester
2014A Low Overhead Quasi-Delay-Insensitive (QDI) Asynchronous Data Path Synthesis Based on Microcell-Interleaving Genetic Algorithm (MIGA)Zhou, Rong; Chong, Kwen-Siong; Chang, Joseph Sylvester; Gwee, Bah Hwee
2009A low-voltage micropower asynchronous multiplier with shift-add multiplication approachGwee, Bah Hwee; Chang, Joseph Sylvester; Shi, Yiqiong; Chua, Chien Chung; Chong, Kwen-Siong
2005A micropower low-voltage multiplier with reduced spurious switchingGwee, Bah Hwee; Chang, Joseph Sylvester; Chong, Kwen-Siong
2021Normalized Differential Power Analysis - for ghost peaks mitigationChen, Juncheng; Ng, Jun-Sheng; Kyaw, Nay Aung; Lwin, Ne Kyaw Zwa; Ho, Weng-Geng; Chong, Kwen-Siong; Lin, Zhiping; Chang, Joseph Sylvester; Gwee, Bah-Hwee