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Low, Jeremy Yung Shern
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Showing results 3 to 10 of 10
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Issue Date
Title
Author(s)
2013
Efficient VLSI implementation of 2^n scaling of signed integer in RNS {2^n-1, 2^n, 2^n+1}
Tay, Thian Fatt
;
Chang, Chip-Hong
;
Low, Jeremy Yung Shern
2012
A fast and compact circuit for integer square root computation based on Mitchell logarithmic method
Low, Joshua Yung Lih
;
Jong, Ching Chuen
;
Low, Jeremy Yung Shern
;
Tay, Thian Fatt
;
Chang, Chip Hong
2008
A full current-mode sense amplifier for low-power SRAM applications
Do, Anh Tuan
;
Low, Jeremy Yung Shern
;
Kong, Zhi Hui
;
Yeo, Kiat Seng
;
Low, Joshua Yung Lih
2013
A new approach to the design of efficient residue generators for arbitrary moduli
Low, Jeremy Yung Shern
;
Chang, Chip Hong
2011
Simple, fast, and exact RNS scaler for the three-moduli set {2n - 1, 2n, 2n + 1}
Chang, Chip-Hong
;
Low, Jeremy Yung Shern
2012
A unified {2n−1, 2n, 2n+1} RNS scaler with dual scaling constants
Low, Jeremy Yung Shern
;
Tay, Thian Fatt
;
Chang, Chip Hong
2012
A VLSI efficient programmable power-of-two scaler for 2n-1, 2n,2n+1 RNS
Low, Jeremy Yung Shern
;
Chang, Chip Hong
2014
VLSI efficient RNS scalers and arbitrary modulus residue generators
Low, Jeremy Yung Shern