Browsing by Author Boon, Chirn Chye


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Issue DateTitleAuthor(s)
 2017A 0.013-mm2 0.53-mW/Gb/s 32-Gb/s hybrid analog equalizer under 21-dB channel loss in 65-nm CMOSBalachandran, Arya; Chen, Yong; Boon, Chirn Chye
2019A 0.044-mm2 0.5-to-7-GHz resistor-plus-source-follower-feedback noise-cancelling LNA achieving a flat NF of 3.3±0.45 dBYu, Haohong; Chen, Yong; Boon, Chirn Chye; Li, Chenyang; Mak, Pui-In; Martins, Rui P.
20170.058 mm2 13 Gbit/s inductorless analogue equaliser with low-frequency equalisation compensating 15 dB channel lossBoon, Chirn Chye; Balachandran, Arya; Chen, Yong; Choi, Pilsoon
 2021A 0.061-mm² 1–11-GHz noise-canceling low-noise amplifier employing active feedforward with simultaneous current and noise reductionLiu, Zhe; Boon, Chirn Chye; Yu, Xiaopeng; Li, Chenyang; Yang, Kaituo; Liang, Yuan
 2011A 0.6-V high reverse-isolation through feedback self-cancellation for single-stage noncascode CMOS LNATran, T. T. N.; Boon, Chirn Chye; Do, Manh Anh; Yeo, Kiat Seng
 2012A 1.2 V 2.4 GHz low spur CMOS PLL synthesizer with a gain boosted charge pump for a batteryless transceiverBoon, Chirn Chye; Krishna, M. Vamshi; Do, Manh Anh; Yeo, Kiat Seng; Do, Aaron V.; Wong, T. S.
 2012A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technologyYi, Xiang; Boon, Chirn Chye; Lin, Jia Fu; Lim, Wei Meng
2021A 13.5-Gb/s 140-GHz silicon redriver exploiting metadevices for short-range OOK communicationsLiang, Yuan; Boon, Chirn Chye; Zhang, Haochi; Tang, Xiao-Lan; Zhang, Qingfeng; Yu, Hao
2018A 2.6–3.4 ghz fractional-N sub-sampling phase-locked loop using a calibration-free phase-switching-sub-sampling techniqueLiang, Zhipeng; Yi, Xiang; Yang, Kaituo; Boon, Chirn Chye
 2017A 20.2–57.1 GHz Inductor-less Divide-by-4 Divider ChainYi, Xiang; Liang, Zhipeng; Boon, Chirn Chye
2015A 220-285 GHz SPDT Switch in 65-nm CMOS Using Switchable Resonator ConceptMeng, Fanyi; Ma, Kaixue; Yeo, Kiat Seng; Boon, Chirn Chye; Lim, Wei Meng; Xu, Shanshan
 2022A 23.4 mW -72-dBc reference spur 40 GHz CMOS PLL featuring a spur-compensation phase detectorLiang, Yuan; Boon, Chirn Chye; Chen, Qian
2019A 24/77 GHz dual-band receiver for automotive radar applicationsYi, Xiang; Feng, Guangyin; Liang, Zhipeng; Wang, Cheng; Liu, Bei; Li, Chenyang; Yang, Kaituo; Boon, Chirn Chye; Xue, Quan
2009A 3-8 GHz low-noise CMOS amplifierMeaamar, Ali; Boon, Chirn Chye; Do, Manh Anh; Yeo, Kiat Seng
2020A 311.6 GHz phase-locked loop in 0.13 μm SiGe BiCMOS process with –90 dBc/Hz in-band phase noiseLiang, Yuan; Boon, Chirn Chye; Chen, Qian; Liu, Zhe; Li, Chenyang; Mausolf, Thomas; Kissinger, Dietmar; Wang, Yong; Ng, Herman Jalli
2020A 3GS/s highly linear energy efficient constant-slope based voltage-to-time converterChen, Qian; Liang, Yuan; Kim, Bongjin; Boon, Chirn Chye
2018A 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle operation for medical imaging applicationsSunny, Sharma; Chen, Yong; Boon, Chirn Chye
2022A 40 GHz CMOS PLL with -75-dBc reference spur and 121.9-fs rms jitter featuring a quadrature sampling phase-frequency detectorLiang, Yuan; Boon, Chirn Chye
 2018A 40 GHz on-chip power combine load for mm-wave power amplifierLin, Jiafu; Zhang, Gary; Boon, Chirn Chye
2018A 52–57 GHz 6-bit phase shifter with hybrid of passive and active structuresQuan, Xing; Yi, Xiang; Boon, Chirn Chye; Yang, Kaituo; Li, Chenyang; Liu, Bei; Liang, Zhipeng; Zhuang, Yiqi