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| Issue Date | Title | Author(s) |
 | 2010 | A 12-bit ultra-low power analog to digital converter design for an infrared imaging system | Liu, Shao Tao. |
 | 2006 | A 16-channel low-power non-uniform spaced filter bank core for digital hearing aids | Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| | 2018 | A 2.5-W 40-MHz-bandwidth hybrid supply modulator with 91% peak efficiency, 3-V output swing, and 4-mV output ripple at 3.6-V supply | He, Huiqiao; Kang, Yang; Ge, Tong; Guo, Linfei; Chang, Joseph Sylvester |
| | 2013 | A 250mV sub-threshold asynchronous 8051microcontroller with a novel 16T SRAM cell for improved reliability in 40nm CMOS | Kim, Jaeyoung; Chong, Kwen-Siong; Chang, Joseph Sylvester; Mazumder, Pinaki |
| 2016 | 3-state BTL closed-loop PWM Class D amplifiers | He, Huiqiao; Ge, Tong; Guo, Linfei; Chang, Joseph Sylvester |
| 1995 | Advanced digital hearing aids for hearing impaired adults and children | An, Wei |
| 2002 | Analogue and digital signal processing circuits for hearing instruments | Tan, Meng Tong. |
| 1995 | Analysis and design of a micropower low-voltage class D audio amplifier | Cheng, Zhihong. |
| 2000 | Analysis and design of power efficient class D amplifier output stages | Chang, Joseph Sylvester; Tan, Meng Tong; Cheng, Zhihong; Tong, Yit Chow |
| 1997 | Analysis, design and IC implementation of an audio class D amplifier for micropower low-voltage applications | Tan, Meng Tong. |
| 2001 | Analysis, design and implementation of a low-power low-voltage audio class D amplifier with feedback | Lon, Yong Seng. |
| 2008 | Asynchronous control network optimization using fast minimum cycle time analysis | Law, Chong Fatt; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| 2017 | Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design | Ho, Weng-Geng; Chong, Kwen-Siong; Ne, Kyaw Zwa Lwin; Gwee, Bah-Hwee; Chang, Joseph Sylvester |
| 2014 | Automated braking system on baby strollers based on iNemo integrated smart sensor platform | Muhammad, Norhaidar |
| | 2018 | A calibration-free/DEM-free 8-bit 2.4-GS/s single-core digital-to-analog converter with a distributed biasing scheme | Juanda; Shu, Wei; Chang, Joseph Sylvester |
| 2013 | Class D amplifier | Zhan, Tianlong |
| 2013 | Class-D amplifier | Kang, Yang. |
| | 2012 | A comparative study on asynchronous Quasi-Delay-Insensitive templates | Chang, Kok-Leong; Lin, Tong; Ho, Weng-Geng; Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| 1995 | Comparison of speech recognition techniques in a noisy environment | Tan, Chin Tuan. |
| 2017 | Controller design for high-frequency switch-mode DC-DC converters | Rajendra Anojh Kumaran |
