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| Issue Date | Title | Author(s) |
 | 2006 | A 16-channel low-power non-uniform spaced filter bank core for digital hearing aids | Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
 | 2001 | Analysis and design of micropower asynchronous adders | Chong, Kwen Siong. |
| 2004 | Analysis, design and implementation of a low-distortion micropower digital class D amplifier | Adrian, Victor |
| 2016 | Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM | Ho, Weng-Geng; Ne, Kyaw Zwa Lwin; Prashanth Srinivas, Nagarajan; Chong, Kwen-Siong; Kim, Tony Tae-Hyoung; Gwee, Bah Hwee |
| 2008 | Asynchronous control network optimization using fast minimum cycle time analysis | Law, Chong Fatt; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| | 2012 | A comparative study on asynchronous Quasi-Delay-Insensitive templates | Chang, Kok-Leong; Lin, Tong; Ho, Weng-Geng; Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| 2014 | Controller design for switched-mode system | Mai, Quoc An |
| | 2020 | Deep Learning-based image analysis framework for hardware assurance of digital integrated circuits | Lin, Tong; Shi, Yiqiong; Shu, Na; Cheng, Deruo; Hong, Xuenong; Song, Jingsi; Gwee, Bah Hwee |
| 2021 | Delayered IC image analysis with template‐based tanimoto convolution and morphological decision | Cheng, Deruo; Shi, Yiqiong; Lin, Tong; Gwee, Bah Hwee; Toh, Kar‐Ann |
| 2004 | Design and implementation of a low voltage micropower 16-bit asynchronous datapath for a low power asynchronous microprocessor | Chang, Khia Ho. |
| 2007 | Design implementation low energy fast fourier transform/inverse fast fourier transform (FFT/IFFT) processor based on asynchronous-logic | Chong, Kwen Siong |
| 2008 | Design of a handshake asynchronous IC design tool | Ho, Weng Geng. |
| 2003 | Design of a low-power asynchronous multiplier | Lim, Khoon Aun. |
| 2014 | Design of asynchronous microprocessor | Rajeindram, Brinthakumari |
| 2003 | Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter | Chua, Chien Chung. |
| 2004 | Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter | Chua, Chien Chung. |
| | 2012 | Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic | Ho, Weng-Geng; Chong, Kwen-Siong; Lin, Tong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| 2007 | Energy-efficient synchronous-logic and asynchronous-logic FFT/IFFT processors | Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
| | 2012 | Extracting functional modules from flattened gate-level netlist | Shi, Yiqiong; Gwee, Bah Hwee; Ren, Ye; Phone, Thet Khaing; Ting, Chan Wai |
| 2016 | High Performance Low Overhead Template-based Cell-Interleave Pipeline (TCIP) for Asynchronous-Logic QDI Circuits | Ho, Weng-Geng; Liu, Nan; Ne, Kyaw Zwa Lwin; Chong, Kwen-Siong; Gwee, Bah Hwee; Chang, Joseph Sylvester |
