Browsing by Author Li, Hong Yu

Showing results 1 to 8 of 8
Issue DateTitleAuthor(s)
2013Effect of direct current stressing to Cu–Cu bond interface imperfection for three dimensional integrated circuitsMade, Riko I.; Peng, Lan; Li, Hong Yu; Gan, Chee Lip; Tan, Chuan Seng
2020Electrical characteristics of three-dimensional metal-insulator-metal (3-D MIM) capacitor embedded in partially-filled Through-Silicon Via (TSV)Lin, Ye; Li, Hong Yu; Tan, Chuan Seng
 2012Integration of low-κ dielectric liner in through silicon via and thermomechanical stress reliefGhosh, Kaushik; Zhang, Jiye; Zhang, Lin; Dong, Yuanwei; Li, Hong Yu; Tan, Cher Ming; Xia, Guangrui; Tan, Chuan Seng
 2012Passivation of Cu surface and its application in Cu-Cu bonding for high density 3D IC realizationTan, Chuan Seng; Lim, Dau Fatt; Peng, Lan; Li, Hong Yu
2006Reservoir effect and the role of low current density regions on electromigration lifetimes in copper interconnectsShao, W.; Chen, Z.; Tu, K. N.; Gusak, A. M.; Gan, Zhenghao; Mhaisalkar, Subodh Gautam; Li, Hong Yu
2011Study of the evolution of Cu-Cu bonding interface imperfection under direct current stressing for three dimensional integrated circuitsMade, Riko I.; Lan, Peng; Li, Hong Yu; Gan, Chee Lip; Tan, Chuan Seng
 2012Three-dimensional wafer stacking using Cu–Cu bonding for simultaneous formation of electrical, mechanical, and hermetic bondsTan, Chuan Seng; Peng, Lan; Fan, Ji; Li, Hong Yu; Gao, Shan
 2012Through silicon via fabrication with low-κ dielectric liner and its implications on parasitic capacitance and leakage currentZhang, Lin; Lim, Dau Fatt; Li, Hong Yu; Gao, Shan; Tan, Chuan Seng