Browsing by Author Lwin, Ne Kyaw Zwa

Showing results 1 to 7 of 7
Issue DateTitleAuthor(s)
2021Dual-hiding side-channel-attack resistant FPGA-based asynchronous-logic AES : design, countermeasures and evaluationChong, Kwen-Siong; Ng, Jun-Sheng; Chen, Juncheng; Lwin, Ne Kyaw Zwa; Kyaw, Nay Aung; Ho, Weng-Geng; Chang, Joseph; Gwee, Bah-Hwee
2015High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC)Ho, Weng-Geng; Chong, Kwen-Siong; Lwin, Ne Kyaw Zwa; Chang, Joseph Sylvester; Gwee, Bah Hwee
2020A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)Ng, Jun-Sheng; Chen, Juncheng; Kyaw, Nay Aung; Lwin, Ne Kyaw Zwa; Ho, Weng-Geng; Chong, Kwen-Siong; Gwee, Bah-Hwee
2021Normalized Differential Power Analysis - for ghost peaks mitigationChen, Juncheng; Ng, Jun-Sheng; Kyaw, Nay Aung; Lwin, Ne Kyaw Zwa; Ho, Weng-Geng; Chong, Kwen-Siong; Lin, Zhiping; Chang, Joseph Sylvester; Gwee, Bah-Hwee
2018Single-event-transient resilient memory for DSP in space applicationsLwin, Ne Kyaw Zwa; Sivaramakrishnan, H.; Chong, Kwen-Siong; Lin, Tong; Shu, Wei; Chang, Joseph S.
2016Success rate model for fully AES-128 in correlation power analysisPammu, Ali Akbar; Chong, Kwen-Siong; Lwin, Ne Kyaw Zwa; Ho, Weng-Geng; Liu, Nan; Gwee, Bah Hwee
2016Total Ionizing Dose (TID) Effects on Finger Transistors in a 65nm CMOS ProcessJiang, Jize; Shu, Wei; Chong, Kwen-Siong; Lin, Tong; Lwin, Ne Kyaw Zwa; Chang, Joseph Sylvester; Liu, Jingyuan