Showing results 1 to 20 of 26
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| Issue Date | Title | Author(s) |
 | 2006 | A 1.8-V 2.4/5.15-GHz dual-band LC VCO in 0.18-μm CMOS technology | Jia, Lin; Ma, Jianguo; Yeo, Kiat Seng; Yu, Xiao Peng; Do, Manh Anh; Lim, Wei Meng |
| 2004 | 9.3–10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance | Lin, Jia; Ma, Jianguo; Yeo, Kiat Seng; Do, Manh Anh |
| 2005 | Accurate and scalable RF interconnect model for silicon-based RFIC applications | Sia, Choon Beng; Ong, Beng Hwee; Yeo, Kiat Seng; Ma, Jianguo; Do, Manh Anh |
| 2007 | Broad-band design techniques for transimpedance amplifiers | Lu, Zhenghao; Yeo, Kiat Seng; Ma, Jianguo; Do, Manh Anh; Lim, Wei Meng; Chen, Xueying |
| 1999 | Comments on “Negative capacitance effect in semiconductor devices” | Ma, Jianguo; Yeo, Kiat Seng; Do, Manh Anh |
| 2006 | A compact size coupling controllable filter with separate electric and magnetic coupling paths | Ma, Kaixue; Ma, Jianguo; Yeo, Kiat Seng; Do, Manh Anh |
| 2008 | Complex shaped on-wafer interconnects modeling for CMOS RFICs | Shi, Xiaomeng; Yeo, Kiat Seng; Ma, Jianguo; Do, Manh Anh; Li, Erping |
| 2006 | Design and optimization of the extended true single-phase clock-based prescaler | Yu, Xiao Peng; Do, Manh Anh; Lim, Wei Meng; Yeo, Kiat Seng; Ma, Jianguo |
| 2005 | Design of a low power wide-band high resolution programmable frequency divider | Yu, Xiao Peng; Do, Manh Anh; Jia, Lin; Ma, Jianguo; Yeo, Kiat Seng |
| 2001 | Effective channel length and external series resistance models of scaled LDD pMOSFETs operating in a Bi-MOS hybrid-mode environment | Seah, Lionel Siau Hing; Yeo, Kiat Seng; Ma, Jianguo; Do, Manh Anh |
| 2005 | Equivalent circuit model of on-wafer CMOS interconnects for RFICs | Shi, Xiaomeng; Ma, Jianguo; Yeo, Kiat Seng; Do, Manh Anh; Li, Erping |
| 2005 | Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction | Boon, Chirn Chye; Do, Manh Anh; Yeo, Kiat Seng; Ma, Jianguo |
| 2003 | Metallization proximity studies for copper spiral inductors on silicon | Sia, Choon Beng; Yeo, Kiat Seng; Do, Manh Anh; Ma, Jianguo |
| 2005 | A miniaturized silicon-based ground ring guarded patch resonator and filter | Ma, Kaixue; Ma, Jianguo; Sun, Jianbo; Miao, Jianmin; Do, Manh Anh; Yeo, Kiat Seng |
| 2006 | A novel CMOS low-noise amplifier design for 3.1-to 10.6-GHz ultra-wide-band wireless receivers | Ma, Jianguo; Do, Manh Anh; Lu, Zhenghao; Lu, Yang; Yeo, Kiat Seng; Cabuk, Alper |
| 2005 | Novel RF process monitoring test structure for silicon devices | Sia, Choon Beng; Ong, Beng Hwee; Lim, Kok Meng; Yeo, Kiat Seng; Do, Manh Anh; Ma, Jianguo; Alam, Tariq |
| 2004 | Parasitic-compensated quadrature LC oscillator | Boon, Chirn Chye; Do, Manh Anh; Yeo, Kiat Seng; Ma, Jianguo; Zhao, R. Y. |
| | 2012 | Phase compensation of cascaded conductor-backed CPW periodic cells | Ma, Kaixue; Yeo, Kiat Seng; Ma, Jianguo |
| 2005 | Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications | Sia, Choon Beng; Ong, Beng Hwee; Chan, Kwok Wai; Yeo, Kiat Seng; Ma, Jianguo; Do, Manh Anh |
| 2004 | RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor | Boon, Chirn Chye; Do, Manh Anh; Yeo, Kiat Seng; Ma, Jianguo; Zhang, Xiao Ling |
