Browsing by Author Teh, Jian Sen
Showing results 1 to 6 of 6
Issue Date | Title | Author(s) | |
---|---|---|---|
2020 | A 12-bit branching time-to-digital converter with power saving features and digital based resolution tuning for PVT variations | Teh, Jian Sen; Siek, Liter | |
2018 | A 14-b, 850fs fully synthesizable stochastic-based branching time-to-digital converter in 65nm CMOS | Teh, Jian Sen; Siek, Liter; Alonso, Abdel Martinez; Firdauzi, Anugerah; Matsuzawa, Akira | |
![]() | 2019 | Design of a time-mode analog-to-digital converter utilizing a time-to-digital converter that is scalable with CMOS technology | Teh, Jian Sen |
![]() | 2014 | DNA sequencing using ISFET-based technology | Teh, Jian Sen |
2018 | Novel edge comparator with input time hysteresis for improved edges arbitration | Teh, Jian Sen; Siek, Liter | |
2016 | Review of pulse generators for gated ring ocillator based Time-to-Digital converters | Teh, Jian Sen; Arjun, Ramaswami Palaniappan; Siek, Liter; Zheng, Yuanjin |