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Showing results 21 to 40 of 23798 < previous   next >
Issue DateTitleAuthor(s)
 2018A 0.4-V, 0.138-fJ/cycle single-phase-clocking redundant-transition-free 24T flip-flop with change-sensing scheme in 40-nm CMOSLe, Van Loi; Li, Juhui; Chang, Alan; Kim, Tony Tae-Hyoung
 2014A 0.42-V input boost dc-dc converter with pseudo-digital pulsewidth modulationSun, Zhuochao; Chew, Roy Kin Wai; Tang, Howard; Yu, Guolei; Siek, Liter
 2013A 0.45V 100-channel neural-recording IC with sub-µW/channel consumption in 0.18µm CMOSHan, Dong; Zheng, Yuanjin; Rajkumar, Ramamoorthy; Dawe, Gavin; Je, Minkyu
 2013A 0.4V 7T SRAM with write through virtual ground and ultra-fine grain power gating switchesKim, Tony Tae-Hyoung; Yeoh, Yuan Lin; Wang, Bo; Yu, Xiangyao
2020A 0.5 V 8-12 bit 300 KSPS SAR ADC with adaptive conversion time detection-and-control for high immunity to PVT variationsKim, Ju Eon; Yoo, Taegeun; Jung, Dong-Kyu; Yoon, Dong-Hyun; Seong, Kiho; Kim, Tony Tae-Hyoung; Baek, Kwang-Hyun
2022A 0.6 V 4 GS/s - 56.4 dB THD voltage-to-time converter in 28 nm CMOSChen, Qian; Boon, Chirn Chye; Liang, Yuan
 2019A 0.6 V, 1.74 ps resolution capacitively boosted time-to-digital converter in 180 nm CMOSPalaniappan, Arjun Ramaswami; Siek, Liter
 2011A 0.6-V high reverse-isolation through feedback self-cancellation for single-stage noncascode CMOS LNATran, T. T. N.; Boon, Chirn Chye; Do, Manh Anh; Yeo, Kiat Seng
 20130.6mW 6.3 GHz 40nm CMOS divide-by-2/3 prescaler using heterodyne phase-locking techniqueYu, Xiao Peng; Lu, Zhenghao; Lim, Wei Meng; Yeo, Kiat Seng
20140.77 fJ/bit/search content addressable memory using small match line swing and automated background checking scheme for variation toleranceDo, Anh Tuan; Yin, Chun; Velayudhan, Kavitha; Lee, Zhao Chuan; Yeo, Kiat Seng; Kim, Tony Tae-Hyoung
 2011A 0.8-μW window SAR ADC with offset cancellation for digital DC–DC convertersFoong, Huey Chian; Tan, Meng Tong; Zheng, Yuanjin
 2017A 0.9-V input PWM DCM boost converter with low output ripples and fast load transient response based on a novel square-root voltage mode (SRVM) control approachLuo, Hao; Siek, Liter
 2013A 0.9-µ A quiescent current output-capacitorless LDO regulator with adaptive power transistors in 65-nm CMOSChong, Sau Siong; Chan, Pak Kwong
 2016A 1 V 103 dB 3rd-order audio continuous-time ΔΣ ADC with enhanced noise shaping in 65 nm CMOSLeow, Yoon Hwee; Tang, Howard; Sun, Zhuochao; Siek, Liter
 20201 × N (N = 2, 8) Silicon selector switch for prospective technologies at the 2 μm wavebandSia, Brian Jia Xu; Li, Xiang; Qiao, Zhongliang; Guo, Xin; Zhou, Jin; Littlejohns, Callum G.; Liu, Chongyang; Reed, Graham T.; Wang, Wanjun; Wang, Hong
2023A 1.1 V 25 ppm/°C relaxation oscillator with 0.045%/V line sensitivity for low power applicationsLiao, Yizhuo; Chan, Pak Kwong
 2012A 1.2 V 2.4 GHz low spur CMOS PLL synthesizer with a gain boosted charge pump for a batteryless transceiverBoon, Chirn Chye; Krishna, M. Vamshi; Do, Manh Anh; Yeo, Kiat Seng; Do, Aaron V.; Wong, T. S.
2003A 1.2-V 1.5-Gb/s 72-Mb DDR3 SRAMCho, Uk Rae; Kim, Tony Tae-Hyoung; Yoon, Yong-Jin; Lee, Jong Cheol; Bae, Dae Gi; Kim, Nam Seog; Kim, Kang Young; Son, Young Jae; Yang, Jeong Suk; Sohn, Kwon Il; Kim, Sung Tae; Lee, In Yeol; Lee, Kwang Jin; Kang, Tae Gyoung; Kim, Su Chul; Ahn, Kee Sik; Byun, Hyun Geun
 2012A 1.2V 80MS/S sample and hold for ADC applicationsReddy, Y. Sunil Gavaskar.; Liter, Siek.
20111.3-μm In(Ga)As quantum-dot VCSELs fabricated by dielectric-free approach with surface-relief processYoon, Soon Fatt; Tong, Cunzhu; Fan, Weijun; Ding, Y.; Zhao, L. J.; Xu, D. W.