MOE2019-T2-1-071

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Project title
MOE2019-T2-1-071

Publications
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Results 1-17 of 17 (Search time: 0.036 seconds).

Accelerating gustavson-based SpMM on embedded FPGAs with element-wise parallelism and access pattern-aware caches   [2023]

Li, Shiqing; Liu, Weichen

Deep learning acceleration: from quantization to in-memory computing   [2022]

Zhu, Shien

Designing efficient DNNs via hardware-aware neural architecture search and beyond   [2021]

Luo, Xiangzhong; Liu, Di; Huai, Shuo; Kong, Hao; Chen, Hui; Liu, Weichen

EdgeNAS: discovering efficient neural architectures for edge systems   [2020]

Luo, Xiangzhong; Liu, Di; Kong, Hao; Liu, Weichen

Efficient FPGA-based sparse matrix-vector multiplication with data reuse-aware compression   [2023]

Li, Shiqing; Liu, Di; Liu, Weichen

An efficient gustavson-based sparse matrix-matrix multiplication accelerator on embedded FPGAs   [2023]

Li, Shiqing; Huai, Shuo; Liu, Weichen

EMNAPE: efficient multi-dimensional neural architecture pruning for EdgeAI   [2023]

Kong, Hao; Luo, Xiangzhong; Huai, Shuo; Liu, Di; Subramaniam, Ravi; Makaya, Christian; Lin, Qian; Liu, Weichen

FAT: an in-memory accelerator with fast addition for ternary weight neural networks   [2022]

Zhu, Shien; Duong, Luan H. K.; Chen, Hui; Liu, Di; Liu, Weichen

HSCoNAS : hardware-software co-design of efficient DNNs via neural architecture search   [2021]

Luo, Xiangzhong; Liu, Di; Huai, Shuo; Liu, Weichen

iMAD: an in-memory accelerator for AdderNet with efficient 8-bit addition and subtraction operations   [2022]

Zhu, Shien; Li, Shiqing; Liu, Weichen

iMAT: energy-efficient in-memory acceleration for ternary neural networks with sparse dot product   [2023]

Zhu, Shien; Huai, Shuo; Xiong, Guochu; Liu, Weichen

Optimized data reuse via reordering for sparse matrix-vector multiplication on FPGAs   [2021]

Li, Shiqing; Liu, Di; Liu, Weichen

Person re-identification via pose-aware multi-semantic learning   [2020]

Luo, Xiangzhong; Duong, Luan H. K.; Liu, Weichen

SurgeNAS: a comprehensive surgery on hardware-aware differentiable neural architecture search   [2022]

Luo, Xiangzhong; Liu, Di; Kong, Hao; Huai, Shuo; Chen, Hui; Liu, Weichen

TAB : unified and optimized ternary, binary and mixed-precision neural network inference on the edge   [2022]

Zhu, Shien; Duong, Luan H. K.; Liu, Weichen

Towards efficient convolutional neural network for embedded hardware via multi-dimensional pruning   [2023]

Kong, Hao; Liu, Di; Luo, Xiangzhong; Huai, Shuo; Subramaniam, Ravi; Makaya, Christian; Lin, Qian; Liu, Weichen

You only search once: on lightweight differentiable architecture search for resource-constrained embedded platforms   [2022]

Luo, Xiangzhong; Liu, Di; Kong, Hao; Huai, Shuo; Chen, Hui; Liu, Weichen