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|Title:||Perspective of flash memory realized on vertical Si nanowires||Authors:||Yu, Hongyu
Kwong, Dim Lee
|Keywords:||DRNTU::Engineering::Electrical and electronic engineering||Issue Date:||2011||Series/Report no.:||Microelectronics reliability||Abstract:||In this review article, the scaling challenges of planar non-volatile memory, especially the flash-types including both floating gate-based and charge-trap-based devices are firstly discussed. The promising prospects brought by 3-Dimensional (3-D) nano-wire-based cells have been presented along with various device demonstrations and discussions on vertical nano-wire platform. The memory devices with highly scaled single-crystal Si nanowire (SiNW) channel and a gate-all-around (GAA) structure achieve superior program/erase (P/E) speed, cycling and high-temperature retention characteristics as compared to the planar one and are considered as promising candidate for future ultra-high non-volatile flash memory application.||URI:||https://hdl.handle.net/10356/96165
|DOI:||10.1016/j.microrel.2011.10.025||Rights:||© 2011 Elsevier Ltd.||Fulltext Permission:||none||Fulltext Availability:||No Fulltext|
|Appears in Collections:||EEE Journal Articles|
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