Analysis and design of 60-GHz SPDT switch in 130-nm CMOS
Zhang, Yue Ping
Date of Issue2012
School of Electrical and Electronic Engineering
This paper proposes a new 60-GHz single-pole-double-throw (SPDT) switch. It is designed in a 1.2-V 130-nm bulk CMOS and has a small core area of 222 μm × 92 μm. The switch exhibits measured insertion loss of 1.7 dB, isolation of 22 dB, input return loss of 20 dB, output return loss of 14 dB, and simulated power-handling capability of 13.8 dBm at 60 GHz. The proposed SPDT switch demonstrates such superior performances and consumes a much smaller die area to those of other SPDT switches, and therefore has potential to be used in highly integrated 60-GHz CMOS radios.
DRNTU::Engineering::Electrical and electronic engineering
IEEE transactions on microwave theory and techniques
© 2012 IEEE.