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|Title:||Analysis and design of 60-GHz SPDT switch in 130-nm CMOS||Authors:||He, Jin
Zhang, Yue Ping
|Keywords:||DRNTU::Engineering::Electrical and electronic engineering||Issue Date:||2012||Source:||He, J., Xiong, Y.-Z., & Zhang, Y. P. (2012). Analysis and Design of 60-GHz SPDT Switch in 130-nm CMOS. IEEE Transactions on Microwave Theory and Techniques, 60(10), 3113-3119.||Series/Report no.:||IEEE transactions on microwave theory and techniques||Abstract:||This paper proposes a new 60-GHz single-pole-double-throw (SPDT) switch. It is designed in a 1.2-V 130-nm bulk CMOS and has a small core area of 222 μm × 92 μm. The switch exhibits measured insertion loss of 1.7 dB, isolation of 22 dB, input return loss of 20 dB, output return loss of 14 dB, and simulated power-handling capability of 13.8 dBm at 60 GHz. The proposed SPDT switch demonstrates such superior performances and consumes a much smaller die area to those of other SPDT switches, and therefore has potential to be used in highly integrated 60-GHz CMOS radios.||URI:||https://hdl.handle.net/10356/96174
|DOI:||http://dx.doi.org/10.1109/TMTT.2012.2211380||Rights:||© 2012 IEEE.||Fulltext Permission:||none||Fulltext Availability:||No Fulltext|
|Appears in Collections:||EEE Journal Articles|
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