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|Title:||A lean FPGA soft processor built using a DSP block||Authors:||Fahmy, Suhaib A.
Maskell, Douglas L.
Cheah, Hui Yan
|Keywords:||DRNTU::Engineering::Computer science and engineering||Issue Date:||2012||Source:||Cheah, H. Y., Fahmy, S. A., Maskell, D. L., & Kulkarni, C. (2012). A lean FPGA soft processor built using a DSP block. Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays.||Abstract:||As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA adoption, so FPGA vendors tailored their architectures to such applications. The resulting embedded digital signal processing (DSP) blocks have now advanced to the point of supporting a wide range of operations. In this paper, we explore how these DSP blocks can be applied to general computation. We show that the DSP48E1 blocks in Xilinx Virtex-6 devices support a wide range of standard processor instructions which can be designed into the core of a basic processor with minimal additional logic usage.||URI:||https://hdl.handle.net/10356/97975
|DOI:||http://dx.doi.org/10.1145/2145694.2145734||Rights:||© 2012 ACM.||Fulltext Permission:||none||Fulltext Availability:||No Fulltext|
|Appears in Collections:||SCSE Conference Papers|
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