Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/98846
Title: Strategy for TSV scaling with consideration on thermo-mechanical stress and acceptable delay
Authors: Zhang, J.
Zhang, L.
Dong, Y.
Li, H. Y.
Ghosh, Kaushik
Tan, Cher Ming
Xia, Guangrui
Tan, Chuan Seng
Issue Date: 2012
Source: Ghosh, K., Zhang, J., Zhang, L., Dong, Y., Li, H., Tan, C. M., Xia, G., & Tan, C. S. (2012). Strategy for TSV scaling with consideration on thermo-mechanical stress and acceptable delay. 2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 49 - 51.
Abstract: Based on the 2011 ITRS road map, the greater accessibility of higher number of TSVs in a specified area depends on the smarter miniaturization of the interconnect dimension in 3D IC packaging. Scaling down the TSV dimension has an inevitable effect on resistance, capacitance, signal transmission as well as the thermo-mechanical stress. We report that the lowering of the TSV diameter is permissible under thermo-mechanical stress consideration. However, the signal transmission delay explodes rapidly and could be tunable via controlling the liner layer capacitance or/and using alternative filler materials.
URI: https://hdl.handle.net/10356/98846
http://hdl.handle.net/10220/12742
DOI: 10.1109/IMPACT.2012.6420220
Fulltext Permission: none
Fulltext Availability: No Fulltext
Appears in Collections:EEE Conference Papers

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