Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/96749
Title: Dataflow graph partitioning for high level synthesis
Authors: Sinha, Sharad
Srikanthan, Thambipillai
Issue Date: 2012
Abstract: This paper presents a dataflow graph (DFG) partitioning methodology for effective high level synthesis in the presence of constraints like data initiation interval (II) and area. It also focuses on handling large DFGs for high level synthesis with area reduction as a requirement. An algorithm for dataflow graph partitioning is presented that aims to reduce area utilization as well as ensure that data initiation interval constraint is met. The algorithm works so as to fit a design into the design space between fully pipelined design and fully resource shared design in order to meet the initiation interval constraint and reduce area only as much as required compared to a fully pipelined design where the area is wasted in the presence of II constraint and a fully resource shared design where the extreme reduction in area puts additional unnecessary constraint on data initiation interval.
URI: https://hdl.handle.net/10356/96749
http://hdl.handle.net/10220/13098
DOI: http://dx.doi.org/10.1109/FPL.2012.6339265
Fulltext Permission: none
Fulltext Availability: No Fulltext
Appears in Collections:SCSE Conference Papers

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