dc.contributor.authorChen, Yupeng
dc.contributor.authorSchmidt, Bertil
dc.contributor.authorMaksell, Douglas L.
dc.date.accessioned2013-08-15T07:21:20Z
dc.date.available2013-08-15T07:21:20Z
dc.date.copyright2012en_US
dc.date.issued2012
dc.identifier.urihttp://hdl.handle.net/10220/13121
dc.description.abstractThe rapid growth of short read datasets poses a new challenge to the mapping of short reads to a reference genome in terms of sensitivity and execution speed. In this work, we present a parallel architecture for short read mapping utilizing field programmable gate array (FPGA)-based hardware. The computation intensive semi-global alignment and the hash table lookup operations are mapped onto an FPGA. The proposed Align Core is implemented with a parallel block structure to gain computational efficiency. We present a new parallel block-wise alignment structure to approximate the conventional dynamic programming algorithm. The performance of our FPGA aligner is compared to the GASSST and BWA software implementations. In terms of the overall execution time, our FPGA aligner achieves a speedup between 3.4 to 6.7 compared to GASSST with a comparable sensitivity and a speedup between 2.5 to 5.2 compared to BWA at a higher sensitivity.en_US
dc.language.isoenen_US
dc.subjectDRNTU::Engineering::Computer science and engineering
dc.titleAn FPGA aligner for short read mappingen_US
dc.typeConference Paper
dc.contributor.conferenceInternational Conference on Field Programmable Logic and Applications (22nd : 2012 : Oslo, Norway)en_US
dc.contributor.schoolSchool of Computer Engineeringen_US
dc.identifier.doihttp://dx.doi.org/10.1109/FPL.2012.6339267


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record