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|Title:||Circuits design for contactless testing of nano-scale CMOS devices and circuits||Authors:||Yu, Xiao Peng
Lim, Wei Meng
Hu, Chang Hui
|Keywords:||DRNTU::Engineering::Electrical and electronic engineering||Issue Date:||2012||Source:||Yu, X. P., Lu, Z. H., Lim, W. M., Liu, Y., & Hu, C. H. (2012). Circuits Design for Contactless Testing of Nano-Scale CMOS Devices and Circuits. Nanoscience and Nanotechnology Letters, 4(9), 930-935(6).||Series/Report no.:||Nanoscience and nanotechnology letters||Abstract:||In this letter, a contactless testing system for nano-scale CMOS devices is presented. It includes parameter-specific ring oscillators, modulator and demodulator with capacitive coupling, which can be fully integrated in a standard CMOS technology. These ring oscillators are used to monitor process variations, while their outputs are modulated and coupled to a demodulator for measurement. The circuits are designed and simulated in standard 40 nm CMOS technology and are able to work robustly against process variations. The system is suitable in contactless testing or built-in self-test for nano-scale CMOS technology with power consumption less than 1 mW and data-rate of 10 Mbps at 3 GHz carrier.||URI:||https://hdl.handle.net/10356/99587
|DOI:||http://dx.doi.org/10.1166/nnl.2012.1421||Fulltext Permission:||none||Fulltext Availability:||No Fulltext|
|Appears in Collections:||EEE Journal Articles|
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