dc.contributor.authorYu, Xiao Peng
dc.contributor.authorLu, Zhenghao
dc.contributor.authorLim, Wei Meng
dc.contributor.authorLiu, Yang
dc.contributor.authorHu, Chang Hui
dc.date.accessioned2013-09-24T07:37:37Z
dc.date.available2013-09-24T07:37:37Z
dc.date.copyright2012en_US
dc.date.issued2012
dc.identifier.citationYu, X. P., Lu, Z. H., Lim, W. M., Liu, Y., & Hu, C. H. (2012). Circuits Design for Contactless Testing of Nano-Scale CMOS Devices and Circuits. Nanoscience and Nanotechnology Letters, 4(9), 930-935(6).
dc.identifier.urihttp://hdl.handle.net/10220/13663
dc.description.abstractIn this letter, a contactless testing system for nano-scale CMOS devices is presented. It includes parameter-specific ring oscillators, modulator and demodulator with capacitive coupling, which can be fully integrated in a standard CMOS technology. These ring oscillators are used to monitor process variations, while their outputs are modulated and coupled to a demodulator for measurement. The circuits are designed and simulated in standard 40 nm CMOS technology and are able to work robustly against process variations. The system is suitable in contactless testing or built-in self-test for nano-scale CMOS technology with power consumption less than 1 mW and data-rate of 10 Mbps at 3 GHz carrier.en_US
dc.language.isoenen_US
dc.relation.ispartofseriesNanoscience and nanotechnology lettersen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering
dc.titleCircuits design for contactless testing of nano-scale CMOS devices and circuitsen_US
dc.typeJournal Article
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.identifier.doihttp://dx.doi.org/10.1166/nnl.2012.1421


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