dc.contributor.authorChong, Kwen-Siong
dc.contributor.authorChang, Kok-Leong
dc.contributor.authorGwee, Bah Hwee
dc.contributor.authorChang, Joseph Sylvester
dc.date.accessioned2013-10-10T06:20:13Z
dc.date.available2013-10-10T06:20:13Z
dc.date.copyright2012en_US
dc.date.issued2012
dc.identifier.citationChong, K. S., Chang, K. L., Gwee, B. H., & Chang, J. S. (2012). Synchronous-logic and globally-asynchronous-locally-synchronous (GALS) acoustic digital signal processors. IEEE journal of solid-state circuits, 47(3), 769-780.
dc.identifier.urihttp://hdl.handle.net/10220/16395
dc.description.abstractWe design an Acoustic Digital Signal Processor (ADSP) SoC, the primary signal processing module of an acoustic signal detection system, based on two design approaches: fully-synchronous (Fully-Sync), and globally-asynchronous-locally-synchronous (GALS). The emphasis of the ADSP designs is low power operation where both designs embody modular-level and circuit-level clock gating techniques. For sake of fair benchmarking, both ADSPs have identical functionality, are designed using the same 130 nm CMOS process, and largely embody the same library cells (save that for the signaling protocols in the GALS ADSP). The GALS ADSP is substantially more power-efficient (the Fully-Sync ADSP dissipates 1.9× more power @ nominal VDD = 1.2 V) and the only cost is the marginally higher (1.02×) IC area. Its higher power efficiency is largely attributed to the exploitation of asynchronous signaling between circuit modules by means of more finely-grained partitioning of the clock domains; intra-circuit signaling therein remains fully-sync. This provides for the ensuing simplification of the clocking infrastructure and subsequent reduction of the global clock rate. The prototype GALS ADSP is able to operate to specifications throughout the lifespan of the battery (VDD = 0.9 V-1.4 V, in part depicting Dynamic Voltage Scaling attributes) and at VDD = 1.2 V, it dissipates 186 μW.en_US
dc.language.isoenen_US
dc.relation.ispartofseriesIEEE journal of solid-state circuitsen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering
dc.titleSynchronous-logic and globally-asynchronous-locally-synchronous (GALS) acoustic digital signal processorsen_US
dc.typeJournal Article
dc.contributor.researchTemasek Laboratoriesen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.identifier.doihttp://dx.doi.org/10.1109/JSSC.2011.2181678


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