Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/99156
Title: Through-silicon via fabrication with pulse-reverse electroplating for high density nanoelectronics
Authors: Lin, Nay
Miao, Jianmin
Keywords: DRNTU::Engineering::Materials::Microelectronics and semiconductor materials::Nanoelectronics and interconnects
Issue Date: 2013
Source: Lin, N., & Miao, J. (2013). Through-silicon via fabrication with pulse-reverse electroplating for high density nanoelectronics. 2013 IEEE 5th International Nanoelectronics Conference (INEC), pp.381-384.
Abstract: In this paper, fabrication of through-silicon vias (TSV) with different diameters ranging from 60 to 150 μm is reported. It was observed that at the low current density of 20 mA/cm2, all the through-holes with different diameters are filled with copper without voids and pores. At higher current density of 40 mA/cm2, however, the pillars with diameters bigger than 100 μm tend to have voids at the middle portion of pillars. Focused ion beam (FIB) examination of the copper pillars fabricated with low current density reveals the difference in grain size and internal structure of the grain along the length of the pillar. Current-potential characters of solution were studied for the electrolyte bath used in the process. It shows the limiting current density around 40-60mA/cm2. The microstructures of TSV fabricated at low and high current densities are investigated and it shows that high current density produces porous copper with void at the core of TSV.
URI: https://hdl.handle.net/10356/99156
http://hdl.handle.net/10220/17196
DOI: 10.1109/INEC.2013.6466053
Fulltext Permission: none
Fulltext Availability: No Fulltext
Appears in Collections:MAE Conference Papers

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