Design of non-destructive single-sawtooth pulse based readout for STT-RAM by NVM-SPICE
Author
Wang, Yuhao
Shang, Yang
Yu, Hao
Date of Issue
2012Conference Name
Annual Non-Volatile Memory Technology Symposium (12th : 2012 : Singapore)
School
School of Electrical and Electronic Engineering
Version
Accepted version
Abstract
Spin-transfer torque random access memory (STTRAM)
is one promising candidate for future non-volatile memory
based computing, because of its fast access time, high integration
density and non-volatility. One major challenge of STT-RAM
is to design robust readout circuit in the presence of large
MTJ resistance variations. The lack of SPICE-like platform
hinders the design validation for hybrid STT-MTJ and CMOS
memory structure and readout circuits. In this paper, we have
introduced the recently developed NVM-SPICE for the design
of STT-RAM with large memory array and also non-destructive
single-sawtooth pulse based STT-RAM readout. Compared to
the simulation by equivalent circuit, the NVM-SPICE shows
117x faster simulation time for large-array STT-RAM. Moreover,
validated by the NVM-SPICE, the proposed single-sawtooth pulse
based readout shows 2x faster read latency with 8x larger sensing
margin than the existing readout schemes.
Subject
DRNTU::Engineering::Electrical and electronic engineering
Type
Conference Paper
Rights
© 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/NVMTS.2013.6632865].
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