Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/103948
Title: Design of reconfigurable filter bank architecture using improved coefficient decimation-interpolation-masking technique for multi-standard wireless communication receivers
Authors: Dhabu, Sumedh
Smitha, Kavallur Pisharath Gopi
Vinod, Achutavarrier Prasad
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems
Issue Date: 2014
Source: Dhabu, S., Smitha, K. P. G., & Vinod, A. P. (2014). Design of reconfigurable filter bank architecture using improved coefficient decimation-interpolation-masking technique for multi-standard wireless communication receivers. Journal of low power electronics, 10(3), 417-428.
Series/Report no.: Journal of low power electronics
Abstract: The channelizer in a multi-standard base station radio receiver typically needs to extract a large number of radio channel(s) i.e., frequency band(s) of different communication standards from the wideband input signal. The channelizer employs a digital filter bank to extract multiple channels simultaneously. Such multi-standard channelizers should have reconfigurable hardware for dynamic adaptability to extract the desired channel(s) according to the current standard of operation. In this paper we propose an Improved Coefficient Decimation-Interpolation-Masking based method (IDIM) for realizing dynamically reconfigurable filter banks. Our IDIM technique offers flexibility in terms of both the subband bandwidth and the number of subbands of the filter bank. We present the design example of reconfigurable filter bank architecture based on IDIM technique which is able to generate 12 distinct filter banks, including 3 uniform filter banks, using only fixed-coefficient filters. When only uniform filter bank is to be designed, the IDIM filter bank offers area reduction of 67.45%, 18.55% and 50.98% over discrete Fourier transform filter bank (DFTFB), frequency response masking based filter bank and coefficient decimation based filter bank (CDM filter bank) and power reduction of 55.16% and 19.59% over DFTFB and CDM filter bank respectively. Our reconfigurable filter bank architecture can be used for channelization as well as spectrum sensing and it achieves 90.93%, 89.18%, 81.27%, 29.77% reductions in the area (in terms of equivalent gate-count per filter bank) compared to the CDM filter bank, DFTFB, fast filter bank, and coefficient decimation combined with frequency response masking based filter bank respectively.
URI: https://hdl.handle.net/10356/103948
http://hdl.handle.net/10220/24646
ISSN: 1546-1998
DOI: http://dx.doi.org/10.1166/jolpe.2014.1338
Rights: © 2014 American Scientific Publishers.
metadata.item.grantfulltext: none
metadata.item.fulltext: No Fulltext
Appears in Collections:SCSE Journal Articles

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