dc.contributor.authorHe, Feifei
dc.contributor.authorTan, Cher Ming
dc.date.accessioned2015-03-30T02:47:28Z
dc.date.available2015-03-30T02:47:28Z
dc.date.copyright2012en_US
dc.date.issued2012
dc.identifier.citationHe, F., & Tan, C. M. (2012). 3D simulation-based research on the effect of interconnect structures on circuit reliability. World journal of modelling and simulation, 8(4), 271-284.en_US
dc.identifier.issn1746-7233en_US
dc.identifier.urihttp://hdl.handle.net/10220/25292
dc.description.abstractElectromigration (EM) of the interconnects is a key factor in determining the reliability of an integrated circuit, especially for the present-day IC with shrinking interconnect dimension. The simulation of the EM reliability of the interconnects is usually performed using the line-via structure at the EM test temperature (e.g. 300 oC).However, such simulation using the line-via structure may not give the same void nucleation location as in the real circuit structure, especially at the circuit operation temperature (e.g. 90C). This change in failure site can cause mis-interpretation of the EM weak spot location when the line-via structure is used for data extrapolation in predicting the EM reliability of the entire circuit. This drives the need for the reliability simulation using a complete 3D circuit model. In this paper, we build several 3D models of a simple circuit with different interconnect structures and examine the effect of the layout structural changes, such as the via and contact positions and their numbers, the inter-transistor distance, the metal structure and layer number, on the circuit EM reliability. 3D circuit model. In this paper, we build several 3D models of a simple circuit with different interconnect structures and examine the effect of the layout structural changes, such as the via and contact positions and their numbers, the inter-transistor distance, the metal structure and layer number, on the circuit EM reliability. A 585.40% improvement in the EM lifetime can be obtained by using Metal 1 as the output line instead of the metal/via stacks, while a 136.97% reduction in the EM lifetime is observed when the number of contacts of the transistor reduces from 6 to 3.The simulation results are consistent with the experimental results in the literature and thus validate the capability of performing the EM lifetime comparison of different interconnect structures using the 3D circuit model.en_US
dc.format.extent14 p.en_US
dc.language.isoenen_US
dc.relation.ispartofseriesWorld journal of modelling and simulationen_US
dc.rights© 2012 World Academic Press (WAP) World Academic Union (WAU). This paper was published in World Journal of Modelling and Simulation and is made available as an electronic reprint (preprint) with permission of World Academic Press (WAP) World Academic Union (WAU). The paper can be found at the following URL: [http://www.worldacademicunion.com/journal/1746-7233WJMS/wjmsvol08no04paper03.pdf].  One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law.en_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
dc.title3D simulation-based research on the effect of interconnect structures on circuit reliabilityen_US
dc.typeJournal Article
dc.contributor.researchSingapore Institute of Manufacturing Technologyen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.versionPublished versionen_US
dc.identifier.urlhttp://www.worldacademicunion.com/journal/1746-7233WJMS/wjmsvol08no04paper03.pdf


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record