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|Title:||Sign-extension avoidance and word-length optimization by positive-offset representation for FIR filter design||Authors:||Huang, Ruimin
|Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits||Issue Date:||2011||Source:||Huang, R., Chang, C.-H., Faust, M., Lotze, N., & Manoli, Y. (2011). Sign-extension avoidance and word-length optimization by positive-offset representation for FIR filter design. IEEE transactions on circuits and systems II : express briefs, 58(12), 916-920.||Series/Report no.:||IEEE transactions on circuits and systems II : express briefs||Abstract:||This brief proposes a new approach to utilizing positive-offset representation for sign-extension avoidance in shift-and-add implementation of a finite-impulse response filter. Affine arithmetic is used to model the excess offsets in order to curtail the word-length (WL) expansion problem. Tighter probabilistically justified WL bounds are determined to enable further offset to be removed from each tap. The approach is applicable even after the redundant adders in the multiplier block of the filter have been minimized. Our simulation results show an average power reduction of about 19% over and above the savings achieved by sharing of adders in multiple constant multiplication.||URI:||https://hdl.handle.net/10356/96292
|ISSN:||1549-7747||DOI:||10.1109/TCSII.2011.2168130||Rights:||© 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/TCSII.2011.2168130].||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Journal Articles|
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