Sign-extension avoidance and word-length optimization by positive-offset representation for FIR filter design
Date of Issue2011
School of Electrical and Electronic Engineering
This brief proposes a new approach to utilizing positive-offset representation for sign-extension avoidance in shift-and-add implementation of a finite-impulse response filter. Affine arithmetic is used to model the excess offsets in order to curtail the word-length (WL) expansion problem. Tighter probabilistically justified WL bounds are determined to enable further offset to be removed from each tap. The approach is applicable even after the redundant adders in the multiplier block of the filter have been minimized. Our simulation results show an average power reduction of about 19% over and above the savings achieved by sharing of adders in multiple constant multiplication.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
IEEE transactions on circuits and systems II : express briefs
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