On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse
Date of Issue2015-02-05
School of Electrical and Electronic Engineering
This brief describes the neuromorphic very large scale integration implementation of a synapse utilizing a single floating-gate (FG) transistor that can be used to store a weight in a nonvolatile manner and demonstrate biological learning rules such as spike-timing-dependent plasticity (STDP). The experimental STDP plot (change in weight against △t = tpost - tpre) of a traditional FG synapse from previous studies shows a depression instead of potentiation at some range of positive values of △t-we call this non-STDP behavior. In this brief, we first analyze theoretically the reason for this anomaly and then present a simple solution based on changing control gate waveforms of the FG device to make the weight change conform closely to biological observations over a wide range of parameters. The experimental results from an FG synapse fabricated in AMS 0.35-μm CMOS process design are also presented to justify the claim. Finally, we present the simulation results of a circuit designed to create the modified gate voltage waveform.
Floating gate (FG); learning; neuromorphic; neuroscience; spike-timing-dependent plasticity (STDP); synapse; very large scale integration (VLSI)
IEEE Transactions on Neural Networks and Learning Systems
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