Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C
Kim, Tony Tae-Hyoung
Le Ba, Ngoc
Date of Issue2014-07-29
School of Electrical and Electronic Engineering
This paper presents an 8-Kbit low-power SRAM for high-temperature (up to 300°C) applications. For reliable low-voltage operation, we employed a decoupled 8T SRAM cell structure. To minimize the performance variations caused by the wide operating temperate range, supply voltage was selected in the near-threshold region. A temperature-aware bitline sensing margin enhancement technique is proposed to mitigate the impact of significantly increased bitline leakage on bitline swing and sensing window. A temperature-tracking control circuit generates bias voltage for optimal pull-up current for realizing the proposed enhancement technique. Test chips were fabricated in a commercial 5 V, 1.0 μm SOI technology. Test chip measurement demonstrates successful operation down to 2 V at 300°C. The average energy of 0.94 pJ was achieved at 2 V and 300°C.
IEEE Journal of Solid-State Circuits
© 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/JSSC.2014.2338860].