dc.contributor.authorSwaminathan, Ramabadran
dc.contributor.authorMadhukumar, A. S.
dc.contributor.authorNg, Wee Teck
dc.contributor.authorSee, Chong Meng Samson
dc.date.accessioned2017-04-13T06:47:46Z
dc.date.available2017-04-13T06:47:46Z
dc.date.copyright2017
dc.date.issued2016
dc.identifier.citationSwaminathan, R., Madhukumar, A. S., Ng, W. T., & See, C. M. S. (2017). Parameter estimation of block and helical scan interleavers in the presence of bit errors. Digital Signal Processing, 60, 20-32.en_US
dc.identifier.issn1051-2004en_US
dc.identifier.urihttp://hdl.handle.net/10220/42262
dc.description.abstractIn data communication and digital storage applications, interleaver, which rearranges the encoded data stream, follows the channel encoder to prevent burst errors. In general, forward error correction (FEC) codes provide protection against randomly distributed errors, whereas interleaver provides protection against error bursts. To de-interleave the interleaved data, accurate information about the interleaver parameters is required at the receiver. However, in non-cooperative context, the parameters are either not known or only partially known at the receiver. Therefore, blind/semi-blind estimation of interleaver parameters is mandatory at the receiver in order to successfully de-interleave the interleaved data. In this context, this paper proposes innovative algorithms for the estimation of interleaver parameters such as interleaver period (or size of the interleaver matrix), number of rows and columns of the interleaver matrix, and helical array step size in the presence of bit errors provided the knowledge of type of interleaver is known at the receiver. In addition, it has been assumed that the block and helical scan interleavers follow a convolutional encoder.en_US
dc.language.isoenen_US
dc.relation.ispartofseriesDigital Signal Processingen_US
dc.rights© 2016 Elsevier Inc.en_US
dc.subjectBlind/semi-blind estimationen_US
dc.subjectBlock interleaveren_US
dc.titleParameter estimation of block and helical scan interleavers in the presence of bit errorsen_US
dc.typeJournal Article
dc.contributor.researchTemasek Laboratoriesen_US
dc.contributor.schoolSchool of Computer Science and Engineeringen_US
dc.identifier.doihttp://doi.org/10.1016/j.dsp.2016.08.006
dc.identifier.rims197462


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