Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/86843
Title: Impact of voltage-accelerated stress on hole trapping at operating condition
Authors: Tung, Zhi Yan
Ang, Diing Shenp
Keywords: Bias-temperature Instability
Random Telegraphic Noise
Issue Date: 2016
Source: Tung, Z. Y., & Ang, D. S. (2016). Impact of voltage-accelerated stress on hole trapping at operating condition. IEEE Electron Device Letters, 37(5), 644-647.
Series/Report no.: IEEE Electron Device Letters
Abstract: This letter shows that voltage-accelerated stressing (VAS), a common methodology used in gate-oxide reliability testing, can change the capture activity of a time-zero oxide trap (i.e., already active under operating condition). It is found that after VAS, a time-zero oxide trap can be rendered either significantly more or less likely to capture a hole, implying that the applied electrical stress may have changed the atomic structure of the trap. The question on whether such change is relevant to reliability testing would have to be further considered carefully given the significant impact that charge trapping/detrapping at a single oxide trap may have on the behavior of a small-area MOSFET.
URI: https://hdl.handle.net/10356/86843
http://hdl.handle.net/10220/45201
ISSN: 0741-3106
DOI: http://dx.doi.org/10.1109/LED.2016.2543239
Rights: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/LED.2016.2543239].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

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