dc.contributor.authorTong, Ah Fatt
dc.contributor.authorLim, Wei Meng
dc.contributor.authorSia, Choon Beng
dc.contributor.authorYeo, Kiat Seng
dc.contributor.authorTeng, Zee Long
dc.contributor.authorNg, Pei Fern
dc.identifier.citationTong, A. F., Lim, W. M., Sia, C. B., Yeo, K. S., Teng, Z. L., & Ng, P. F. (2007). RFCMOS unit width optimization technique. IEEE Transactions on Microwave Theory and Techniques, 55(9), 1844-1853.en_US
dc.description.abstractIn this paper, we demonstrate a unit width (Wf) optimization technique based on their unity short-circuit current gain frequency (ft), unilateral power gain frequency (f MAX), and high-frequency (HF) noise for RFCMOS transistors. Our results show that the trend for the above figures-of-merit (FOMs) with respect to the Wf change is different; hence, some tradeoff is required to obtain the optimum Wf value. During the HF noise analysis, a newFOMis proposed to study the Wf effect on the HF noise performance. In our experiment, the flicker noise of the transistor is also measured and the result shows that the change in Wf does not affect the noise spectral density at the low-frequency range. This technique enables RF engineers to optimize the transistor’s layout and helps to select the optimum Wf for transistors used in specific circuit design such as the low-noise amplifier, voltage-controlled oscillator, and mixer. Furthermore, by using layout optimized transistors in the RF circuit, the optimal circuit’s performance can be easily achieved and, thus, greatly reduced the circuit development time. In the aspect of RF device modeling, by knowing the optimum Wf for a particular process or technology, the number of transistors to model is reduced and, hence, greatly shortens the RF modeling development time for existing and future technologies.en_US
dc.format.extent10 p.en_US
dc.relation.ispartofseriesIEEE transactions on microwave theory and techniquesen_US
dc.rights© 2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site.en_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering
dc.titleRFCMOS unit width optimization techniqueen_US
dc.typeJournal Article
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.versionPublished versionen_US

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