Effective channel length and external series resistance models of scaled LDD pMOSFETs operating in a Bi-MOS hybrid-mode environment
Author
Seah, Lionel Siau Hing
Yeo, Kiat Seng
Ma, Jianguo
Do, Manh Anh
Date of Issue
2001School
School of Electrical and Electronic Engineering
Version
Published version
Abstract
The effective channel length L-eff and total external series resistance R-TOTEXT of deep submicron lightly doped drain (LDD) pMOSFETs, operating in a Bi-MOS hybrid-mode environment, have been modeled as functions of bias and temperature. The accuracy of the device threshold voltage used in the L-eff and R-TOTEXT extraction routine is discussed. The proposed models have been verified for temperature ranging from 223 K to 398 K and source-to-body voltage V(sb) ≥ 0 V
conditions.
Subject
DRNTU::Engineering::Electrical and electronic engineering
Type
Journal Article
Series/Journal Title
IEEE transactions on electron devices
Rights
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http://dx.doi.org/10.1109/16.918250
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