dc.contributor.authorSia, Choon Beng
dc.contributor.authorOng, Beng Hwee
dc.contributor.authorLim, Wei Meng
dc.contributor.authorYeo, Kiat Seng
dc.contributor.authorAlam, Tariq
dc.date.accessioned2009-07-28T04:17:45Z
dc.date.available2009-07-28T04:17:45Z
dc.date.copyright2008en_US
dc.date.issued2008
dc.identifier.citationSia, C. B., Ong, B. H., Lim, W. M., Yeo, K. S., & Alam, T. (2008). Modeling and layout optimization of differential inductors for Silicon-based RFIC applications. IEEE Transactions on Electron Devices, 55(4), 1058-1066.en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://hdl.handle.net/10220/4710
dc.description.abstractA scalable RF differential inductor model has been developed, enabling device performance versus layout size tradeoffs and optimization as well as accurate circuit predictions. Comparing inductors with identical inductance values up to an operating frequency of 10 GHz, large conductor width designs are found to yield good performance for inductors with small inductance values. As differential inductance or operating frequency increases, interactions between metallization resistive and substrate losses discourage the use of large widths as it consumes silicon area and degrades device performance.en_US
dc.format.extent9 p.en_US
dc.language.isoenen_US
dc.relation.ispartofseriesIEEE transactions on electron devicesen_US
dc.rights© 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.en_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
dc.titleModeling and layout optimization of differential inductors for Silicon-based RFIC applicationsen_US
dc.typeJournal Article
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.identifier.doihttp://dx.doi.org/10.1109/TED.2008.917536
dc.description.versionPublished versionen_US


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