Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/88969
Title: Bias temperature instability study on switching defects in SiON and high-K gate dielectrics
Authors: Tung, Zhi Yan
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 13-Feb-2019
Source: Tung, Z. Y. (2019). Bias temperature instability study on switching defects in SiON and high-K gate dielectrics. Doctoral thesis, Nanyang Technological University, Singapore.
Abstract: Device reliability remains an extremely challenging issue for the state-of-the-art complementary metal-oxide-semiconductor field-effect transistor (CMOS, MOSFET). One of the most challenging reliability issues in CMOS devices is the bias-temperature instability (BTI). Previous studies on SiON and high-k gate dielectrics (HfO2 and HfSiON) for large area devices reveal that the transient oxide-charge trapping/detrapping by switching oxide traps (SOTs) due to dynamic bias-temperature stress (BTS), which is usually treated as a parasitic effect, may play a role on the gate oxide’s long term reliability. The “fast” measurement used in the studies reveals the inconsistency in the prediction of the classical explanation for the negative-bias temperature instability (NBTI) using a reaction-diffusion (R-D) model. The studies show that the transformation of SOTs to a more permanent form, which is also known as recoverable-to-permanent (R-to-P) transformation, occurs when the exerted thermal-cum-electrical stress surpasses a particular threshold while the cyclical behavior of switching oxide-charge trapping and detrapping is observed when the employed thermal-cum-electrical stress is below this threshold. These observations indicate that the generation of permanent defects is possible due to the change that may occur in the oxide structure caused by the applied thermal-cum-electrical stress. The concurrent increasing of the gate current with the NBTI-induced hole trapping transformation implies that the outset of the bulk oxide trap generation is caused by the hole-trapping conversion. However, electron trapping transformation is not always accompanied by an increase in the gate current. The R-to-P conversion of the SOTs in large-area CMOS devices was revealed in previous studies. The continuing scaling-down of the CMOS ICs leads to considerable interest in the study of small-area devices. The study of the drain current recovery trends on the small-area SiON/polysilicon gate p-MOSFETs subjected to recurring NBTI stress/relaxation cycling presents direct experimental evidence of R-to-P hole-trapping transformation, which was inferred from past research on large-area devices. The emission times of hole traps are normally presumed to be time-invariant, but the results from this study suggest otherwise. Analysis from the experimental evidence demonstrates that the emission times of hole traps are not time-invariant and can increase due to the evolution of the defect sites into more structurally stable configurations. In addition, a new type of switching hole traps is observed, which exhibits intermittent charging during stress and an occasional increase in emission time by ~5 orders of magnitude. A past study reported an observation that generation of stress-induced leakage current (SILC) linearly tracks the decrease in NBTI recovery. This indicates that the bulk oxide trap generation and the NBTI-induced hole-trapping conversion are correlated and stem from the same physical mechanism. The study of the correlation between R-to-P transformation of hole trapping and SILC generation in big-area devices reveals that both sequels eminently showcase similar power-law time exponents, temperature dependence, and activation energies. The revelation of a kink at the temperature of 125oC that indicates a reduction in the activation energy from the low-to-high temperature region in both R-to-P conversion and SILC generation signifies strong connection and a common degradation mechanism between these two effects. Also, investigating the time-dependence of drain as well as gate current shift, ∆Id and ∆Ig respectively, in small-area devices subjected to NBTI stress reveals the positive and negative correlations along with the uncorrelated behavior between these two effects. In addition to the observation of a typical single-step Id recovery accompanied by a change in Ig, fluctuation similar to random telegraph noise (RTN) in Id was also detected to be accompanied by RTN-like fluctuation in Ig. Of particular interest is the relatively significant ∆Ig of ~40% accompanying the ∆Id, which evidently indicate the involvement of bulk oxide defects. A possible mechanism that may activate and deactivate a bulk oxide trap as a trap-assisted tunneling (TAT) center is illustrated based on ab initio simulations of the oxygen-vacancy defects. Two scenarios that may enable a bulk oxide trap to function as a TAT center in the positively charged state are discussed. The impact of voltage-accelerated stress (VAS) on hole trapping probed in the operating environment was examined. The charge-capturing activity of time-zero oxide traps measured under operating condition can be altered by VAS. After the application of VAS, the time-zero oxide traps can become either more active or less active in hole capturing in the operating environment, suggesting that the trap atomic structure may have been modified by the VAS. Also, after undergoing a relaxation or an idle state for a period of time, the charge-capture activity of the oxide traps may revert to their pre-VAS state. More intriguingly, the drain-current recovery step amplitude of a single oxide charge emitted by an SOT can be altered by VAS. The observed stress-induced change of trap-switching behavior and the alteration of the drain-current degradation under operating conditions should be taken into account in the reliability evaluation of small-area devices. This is essential given the remarkably increasing impact of oxide charge trapping on device channel conduction as the size of the device reduces. In addition to the NBTI studies, a PBTI study was performed as well. An intriguing trend was observed in the examination of the frequency dependence of dynamic positive-bias temperature instability (DPBTI) on HfO2/TiN gate n-MOSFETs. The investigation reveals that the shallow-to-deep electron traps transformation exhibits an unanticipated positive dependence on the gate frequency as the PBTI stress progresses, i.e. the fraction of the shallow-to-deep electron trap conversion increases with frequency, causing more permanent electron traps at higher gate frequency in the investigated frequency range of 1 mHz to 1 MHz.
URI: https://hdl.handle.net/10356/88969
http://hdl.handle.net/10220/47652
DOI: https://doi.org/10.32657/10220/47652
metadata.item.grantfulltext: open
metadata.item.fulltext: With Fulltext
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