dc.contributor.authorWang, Bing
dc.contributor.authorLee, Kwang Hong
dc.contributor.authorWang, Cong
dc.contributor.authorWang, Yue
dc.contributor.authorMade, Riko I.
dc.contributor.authorSasangka, Wardhana Aji
dc.contributor.authorNguyen, Viet Cuong
dc.contributor.authorLee, Kenneth Eng Kian
dc.contributor.authorTan, Chuan Seng
dc.contributor.authorYoon, Soon Fatt
dc.contributor.authorFitzgerald, Eugene A.
dc.contributor.authorMichel, Jurgen
dc.contributor.editorEldada, Louay A.*
dc.contributor.editorLee, El-Hang*
dc.contributor.editorHe, Sailing*
dc.identifier.citationWang, B., Lee, K. H., Wang, C., Wang, Y., Made, R. I., Sasangka, W. A., . . . Michel, J. (2017). The integration of InGaP LEDs with CMOS on 200 mm silicon wafers. Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX, 10107, 101070Y-. doi:10.1117/12.2252030en_US
dc.description.abstractThe integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.en_US
dc.format.extent8 p.en_US
dc.relation.ispartofseriesProceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIXen_US
dc.rights© 2017 SPIE. All rights reserved. This paper was published in Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX and is made available with permission of SPIE.en_US
dc.subjectInGaP LEDen_US
dc.subjectCMOS Integrationen_US
dc.subjectEngineering::Electrical and electronic engineeringen_US
dc.titleThe integration of InGaP LEDs with CMOS on 200 mm silicon wafersen_US
dc.typeJournal Article
dc.contributor.conferenceSPIE OPTO*
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.versionPublished versionen_US

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