Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/90664
Title: System-level design of a delta-sigma modulator target for next generation wireless application
Authors: Qiu, Xiaobo
Siek, Liter
Tiew, Kei Tee
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2009
Source: Qiu, X., Siek, L., & Tiew, K. T. (2009). System-level design of a delta-sigma modulator target for next generation wireless application. In Proceedings of the IEEE International Symposium on Radio-Frequency Integration Technology(pp.303-306).
Abstract: Delta-sigma (Δ∑) converters have been widely used in wireless communications as they provide the most economic speed-accuracy tradeoff. This paper presents the system-level design of a multi-bit continuous-time (CT) Δ∑ analog-to-digital converter (ADC) targeting for the next generation wireless application. The modulator topology is determined based on the application requirements using MATLAB software. The nonidealities associated with the multi-bit CT Δ∑ modulator, such as excess loop delay, system clock jitter, integrator nonideality and multi-bit digital-toanalog converter (DAC) element mismatch, are also modeled in the system-level. With all the nonidealities included, the designed modulator achieves a dynamic range (DR) of 74dB (12 bits) in a 50-MHz signal bandwidth.
URI: https://hdl.handle.net/10356/90664
http://hdl.handle.net/10220/6288
DOI: 10.1109/RFIT.2009.5383676
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Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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