Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/93518
Title: Silicon odometer : an on-chip reliability monitor for measuring frequency degradation of digital circuits
Authors: Kim, Tony Tae-Hyoung
Persaud, Randy.
Kim, Chris H.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2008
Source: Kim, T. H., Persaud, R., & Kim, C. H. (2008). Silicon odometer: an on-chip reliability monitor for measuring frequency degradation of digital circuits. IEEE Journal of Solid State Circuits. 43(4), 874-880.
Series/Report no.: IEEE journal of solid state circuits
Abstract: Precise measurement of digital circuit degradation is a key aspect of aging tolerant digital circuit design. In this study, we present a fully digital on-chip reliability monitor for high-resolution frequency degradation measurements of digital circuits. The proposed technique measures the beat frequency of two ring oscillators, one stressed and the other unstressed, to achieve 50 X higher delay sensing resolution than that of prior techniques. The differential frequency measurement technique also eliminates the effect of common-mode environmental variation such as temperature drifts between each sampling points. A 265 X 132 mum square test chip implementing this design has been fabricated in a 1.2 V, 130 nm CMOS technology. The measured resolution of the proposed monitoring circuit was 0.02%, as the ring oscillator in this design has a period of 4 ns; this translates to a temporal resolution of 0.8 ps. The 2 mus measurement time was sufficiently short to suppress the unwanted recovery effect from concealing the actual circuit degradation.
URI: https://hdl.handle.net/10356/93518
http://hdl.handle.net/10220/6327
ISSN: 0018-9200
DOI: 10.1109/JSSC.2008.917502
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Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

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